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| 型号： | ADF4602BCPZ-RL |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | Single-Chip, Multiband 3G Femtocell Transceiver; Package: LFCSP: Leadform Chip Scale; No of Pins: 40; Temperature Range: Ind |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, QCC40 |
| 封装： | 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40 |
| 文件页数： | 22/36页 |
| 文件大小： | 646K |
| 代理商： | ADF4602BCPZ-RL |
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ADF4602
Rev. A | Page 29 of 36
Table 12. Transmitter User Registers
Register
Bit
Bit Name
Description
[12:11]
test_I/swap_I
These bits allow various options on the I inputs as detailed in the following table:
21, A1,
Write
Bits
Function
00
Normal operation
01
Swap I differential inputs for ease of PCB routing to DAC
10
Zero input on I inputs
11
DC offset applied to I inputs; creates large carrier at RF
[10:9]
test_Q/swap_Q
These bits allow various options on the Q inputs as detailed in the table below:
Bits
Function
00
Normal operation
01
Swap Q differential inputs for ease of PCB routing to DAC
10
Zero input on Q inputs
11
DC offset applied to Q inputs: creates large carrier at RF
[8:7]
gain_blanksel
During a transmit gain change, some spectral splatter may occur at the output of the transmitter.
These bits allow the input baseband signal at the input to the low-pass filter to be blanked for a
short period, to reduce the spectral splatter observed during the gain change.
gain_blanksel[8:7]
Operation
00
Default setting; no blanking
01
230 ns blanking
10
540 ns blanking
11
850 ns blanking
6
cmmod
This bit adjusts the internal modulator common-mode setting. It should be set to 0. Setting this bit
to 1 results in reduced power consumption but degrades transmit linearity.
[5:0]
vcm_sat_thres
This bit should be set to 0x1F for normal operation.
15:
dacgpo_owen
Setting this bit high allows the user to have manual control over DAC2 and GPO1 to GPO4.
22, A1,
Write
[14:11]
gpo_ow
These bits allow manual control of GPO 1 to GPO 4. Bit dacgpo_owen must be set to 1 to allow this
mode of operation. Each bit controls one of the GPOs as per the following table. This allows all
possible permutations of GPO output combinations.
gpo_ow[14 :11]1
Mode
XXX1
GPO1 high
XX1X
GPO2 high
X1XX
GPO3 high
1XXX
GPO4 high
[10:5]
padac2_ow
These bits allow manual control of DAC2. Bit dacgpo_owen must be set to 1 to allow this mode of
operation.
[4:0]
padac1
These bits control DAC1.
26, A1,
Write
[15:0]
txfreq
These bits set the transmitter synthesizer frequency in 50 kHz steps from 0 MHz to 3276.75 MHz.
For the high bands, this is equal to the channel frequency, and for the low bands it is 2× the
channel frequency.
For example:
Bit 15 to Bit 0 (Hex)
HB Synthesizer Frequency
LB synthesizer Frequency
0xA730
2140 MHz
1070 MHz
0xA988
2170 MHz
1085 MHz
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