参数资料
型号: ADF5000BCPZ-RL7
厂商: Analog Devices Inc
文件页数: 8/12页
文件大小: 0K
描述: IC PRESCALER 18GHZ 16LFCSP
标准包装: 1,500
类型: 预定标器(RF)
PLL:
输入: 时钟
输出: 时钟
电路数: 1
比率 - 输入:输出: 1:1
差分 - 输入:输出: 无/是
频率 - 最大: 18GHz
除法器/乘法器: 是/无
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘,CSP
供应商设备封装: 16-LFCSP-WQ(3x3)
包装: 带卷 (TR)
Data Sheet
ADF5000
Rev. A | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
NOTES
1. NC = NO CONNECT. DO NOT CONNECT
TO THIS PIN.
2. THE EXPOSED PADDLE MUST BE
CONNECTED TO GND.
1
GND
2
RFIN
3
GND
4
GND
11 RFOUT
12 GND
10 RFOUT
9
GND
5
G
ND
6
NC
7
CE
8
G
ND
15
V
DD1
16
G
ND
14
V
DD2
13
G
ND
TOP VIEW
(Not to Scale)
ADF5000
09129-
002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 3, 4, 5, 8, 9,
12, 13, 16
GND
RF Ground. Tie all ground pins together.
2
RFIN
Single-Ended 50 Ω Input to the RF Prescaler. This pin is ac-coupled internally via a 3 pF capacitor.
6
NC
No Connect. Do not connect to this pin.
7
CE
Chip Enable. This pin is active high. When CE is brought low, the part enters power-down mode. If this
functionality is not required, the pin can be left unconnected because it is pulled up internally through
a weak pull-up resistor.
10
RFOUT
Divided-Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied to VDD2 and an
ac coupling capacitor of 1 pF.
11
RFOUT
Complementary Divided Down Output of the Prescaler. This pin has an internal 100 Ω load resistor tied
to VDD2 and an ac coupling capacitor of 1 pF.
14
VDD2
Voltage Supply for the Output Stage. Decouple this pin to ground with a 0.1 F capacitor in parallel with a
10 pF capacitor. VDD2 can be tied directly to VDD1.
15
VDD1
Voltage Supply for the Input Stage and Divider Block. Decouple this pin to ground with a 0.1 F capacitor
in parallel with a 10 pF capacitor.
EPAD
The LFCSP has an exposed paddle that must be connected to GND.
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