参数资料
型号: ADG2128BCPZ-HS-RL7
厂商: Analog Devices Inc
文件页数: 10/28页
文件大小: 0K
描述: IC CROSSPOINT SWIT 8X12 32LFCSP
产品培训模块: iCMOS™ Switches and Multiplexers for Data Acquisition
Switch Fundamentals
产品变化通告: Interface Change Notice 12/Apr/2010
标准包装: 1
功能: 交叉点开关
电路: 1 x 8:12
导通状态电阻: 50 欧姆
电压电源: 单/双电源
电压 - 电源,单路/双路(±): 12V,±15V
电流 - 电源: 50nA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 标准包装
产品目录页面: 801 (CN2011-ZH PDF)
配用: EVAL-ADG2128EBZ-ND - BOARD EVAL FOR ADG2128
其它名称: ADG2128BCPZ-HS-RL7DKR
ADG2128
Data Sheet
Rev. D | Page 18 of 28
THEORY OF OPERATION
The ADG2128 is an analog cross point switch with an array size
of 8 × 12. The 12 rows are referred to as the X input/output lines,
while the eight columns are referred to as the Y input/output
lines. The device is fully flexible in that it connects any X line or
number of X lines with any Y line when turned on. Similarly, it
connects any X line with any number of Y lines when turned on.
Control of the ADG2128 is carried out via an I2C interface. The
device can be operated from single supplies of up to 13.2 V or
from dual ±5 V supplies. The ADG2128 has many attractive
features, such as the ability to reset all the switches, the ability to
update many switches at the same time, and the option of
reading back the status of any switch. All of these features are
described in more detail here in the Theory of Operation
section.
RESET/POWER-ON RESET
The ADG2128 offers the ability to reset all of the 96 switches to
the off state. This is done through the RESET pin. When the
RESET pin is low, all switches are open (off), and appropriate
registers are cleared. Note that the ADG2128 also has a power-
on reset block. This ensures that all switches are in the off
condition on power-up of the device. In addition, all internal
registers are filled with 0s and remain so until a valid write to
the ADG2128 takes place.
LOAD SWITCH (LDSW)
LDSW is an active high command that allows a number of
switches to be simultaneously updated. This is useful in
applications where it is important to have synchronous
transmission of signals. There are two LDSW modes: the
transparent mode and the latched mode.
Transparent Mode
In this mode, the switch position changes after the new word
is written in. LDSW is set to 1.
Latched Mode
In this mode, the switch positions are not updated at the same
time that the input registers are written to. This is achieved by
setting LDSW to 0 for each word (apart from the last word)
written to the device. Then, setting LDSW to 1 for the last word
allows all of the switches in that sequence to be simultaneously
updated.
READBACK
Readback of the switch array conditions is also offered when in
standard mode and fast mode. Readback enables the user to
check the status of the switches of the ADG2128. This is very
useful when debugging a system.
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