参数资料
型号: ADG3243BRJ-REEL7
厂商: Analog Devices Inc
文件页数: 7/12页
文件大小: 0K
描述: IC SW BUS CTRL 2.5/3.3V SOT23-8
标准包装: 3,000
类型: 总线开关
电路: 1 x 1:1
独立电路: 2
电压电源: 单电源
电源电压: 2.5V, 3.3V
安装类型: 表面贴装
封装/外壳: SOT-23-8
供应商设备封装: SOT-23-8
包装: 带卷 (TR)
REV. 0
–4–
ADG3243
TERMINOLOGY
VCC
Positive Power Supply Voltage.
GND
Ground (0 V) Reference.
VINH
Minimum Input Voltage for Logic 1.
VINL
Maximum Input Voltage for Logic 0.
II
Input Leakage Current at the Control Inputs.
IOZ
OFF State Leakage Current. It is the maximum leakage current at the switch pin in the OFF state.
IOL
ON State Leakage Current. It is the maximum leakage current at the switch pin in the ON state.
VP
Maximum Pass Voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when
the switch input voltage is equal to the supply voltage.
RON
Ohmic Resistance Offered by a Switch in the ON State. It is measured at a given voltage by forcing a specified
amount of current through the switch.
RON
ON Resistance Match between Any Two Channels, i.e., RON max – RON min.
CX OFF
OFF Switch Capacitance.
CX ON
ON Switch Capacitance.
CIN
Control Input Capacitance. This consists of
BEx.
ICC
Quiescent Power Supply Current. This current represents the leakage current between the VCC and ground pins.
It is measured when all control inputs are at a logic high or low level and the switches are OFF.
ICC
Extra power supply current component for the
EN control input when the input is not driven at the supplies.
tPLH, tPHL
Data Propagation Delay through the Switch in the ON State. Propagation delay is related to the RC time constant
RON
× CL, where CL is the load capacitance.
tPZH, tPZL
Bus Enable Times. These are the times taken to cross the VT voltage at the switch output when the switch turns on
in response to the control signal,
BEx.
tPHZ, tPLZ
Bus Disable Times. This is the time taken to place the switch in the high impedance OFF state in response to the control
signal. It is measured as the time taken for the output voltage to change by V from the original quiescent level,
with reference to the logic level transition at the control input. (Refer to Figure 3 for enable and disable times.)
Max Data Rate
Maximum Rate at which Data Can Be Passed through the Switch.
Channel Jitter
Peak-to-Peak Value of the Sum of the Deterministic and Random Jitter of the Switch Channel.
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