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| 型号： | ADG444BRZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH QUAD SPST 16SOIC |
| 产品培训模块： | Switch Fundamentals |
| 标准包装： | 2,500 |
| 系列： | LC²MOS |
| 功能： | 开关 |
| 电路： | 4 x SPST - NC |
| 导通状态电阻： | 110 欧姆 |
| 电压电源： | 单/双电源 |
| 电压 - 电源，单路/双路(±)： | 12V，±15V |
| 电流 - 电源： | 1nA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
ADG441/ADG442/ADG444
Rev. A | Page 12 of 16
TRENCH ISOLATION
In the ADG441A, ADG442A, and ADG444A, an insulating
oxide layer (trench) is placed between the NMOS and the
PMOS transistors of each CMOS switch. Parasitic junctions,
which occur between the transistors in junction isolated
switches, are eliminated, and the result is a completely latch-up
proof switch.
In junction isolation, the N and P wells of the PMOS and
NMOS transistors form a diode that is reverse-biased under
normal operation. However, during overvoltage conditions, this
diode becomes forward-biased. A silicon-controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
significant amplification of the current which, in turn, leads to
latch-up. With trench isolation, this diode is removed, and the
result is a latch-up proof switch.
05233-
004
BURIED OXIDE LAYER
SUBSTRATE (BACK GATE)
TRENCH
P-WELL
N-WELL
LOCO
NMOS
PMOS
Figure 21. Trench Isolation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADG444BRZ-REEL1 | 制造商:AD 制造商全称:Analog Devices 功能描述:LC2MOS Quad SPST Switches ADG441/ADG442/ADG444 |
| ADG445BQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Interface IC |
| ADG445TQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Interface IC |
| ADG451 | 制造商:AD 制造商全称:Analog Devices 功能描述:LC2MOS 5 ohm RON SPST Switches |
| ADG451_06 | 制造商:AD 制造商全称:Analog Devices 功能描述:LC2MOS 5 ?? RON SPST Switches |
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