参数资料
型号: ADG467BRSZ
厂商: Analog Devices Inc
文件页数: 8/10页
文件大小: 0K
描述: IC CHAN PROTECTOR OCTAL 20-SSOP
标准包装: 66
系列: ADG467
电压 - 箝位: ±40V
技术: 混合技术
电路数: 8
应用: 通用
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 管件
产品目录页面: 800 (CN2011-ZH PDF)
ADG466/ADG467
When a negative overvoltage is applied to the channel protector
circuit, the PMOS transistor enters a saturated mode of opera-
tion as the drain voltage exceeds V SS – V TP . See Figure 20 be-
low. As in the case of the positive overvoltage, the other MOS
devices are nonsaturated.
NEGATIVE
TRENCH ISOLATION
The MOS devices that make up the channel protector are iso-
lated from each other by an oxide layer (trench) (see Figure 22).
When the NMOS and PMOS devices are not electrically iso-
lated from each other, there exists the possibility of “latch-up”
caused by parasitic junctions between CMOS transistors. Latch-
up is caused when P-N junctions that are normally reverse bi-
OVERVOLTAGE
(–20V)
V SS – V TP *
(–13V)
ased become forward biased, causing large currents to flow,
which can be destructive.
NEGATIVE
OVERVOLTAGE
NMOS
PMOS
NMOS
CMOS devices are normally isolated from each other by Junc-
(–20V)
tion Isolation . In Junction Isolation, the N and P wells of the
NON- SATURATED
SATURATED
V DD (+15V) V SS (–15V)
*V TP = PMOS THRESHOLD VOLTAGE (–2V)
NON-
SATURATED
V DD (+15V)
CMOS transistors form a diode that is reverse-biased under
normal operation. However, during overvoltage conditions, this
diode becomes forward biased. A Silicon-Controlled Rectifier
(SCR) type circuit is formed by the two transistors causing a
Figure 20. Negative Overvoltage on the Channel Protector
The channel protector is also functional when the supply rails
are down (e.g., power failure) or momentarily unconnected
significant amplification of the current that, in turn, leads to
latch-up. With Trench Isolation, this diode is removed; the
result is a latch-up proof circuit.
(e.g., rack system). This is where the channel protector has an
advantage over more conventional protection methods such as
diode clamping (see Applications Information). When V DD and
V S
V G
V D
V S
V G
V D
V SS equal 0 V, all transistors are off and the current is limited to
subnano-ampere levels (see Figure 21).
T
R
P+
P-CHANNEL
P+
T
R
N+
N-CHANNEL
N+
T
R
E
E
E
(0V)
N
N
N
C
H
N–
C
H
P–
C
H
POSITIVE OR
NEGATIVE
NMOS
PMOS
NMOS
BURIED OXIDE LAYER
OVERVOLTAGE
S UBSTRATE          (BACKGATE)
OFF
OFF
OFF
V DD (0V)
V SS (0V)
V DD (0V)
Figure 22. Trench Isolation
Figure 21. Channel Protector Supplies Equal to Zero Volts
–8 –
REV. A
相关PDF资料
PDF描述
MMB23-0441K1 CONN RACK/PANEL 44POS 5A
NPTC142KFMS-RC CONN FEMALE 28POS DL .1" TIN SMD
956220-2000-AR-PR CONN SOCKET 20POS 2MM VERT SMD
2060.0009.24 FUSE 1A 125V SMD FAST
MMD23-044 CONN RACK/PANEL 44POS 5A
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