参数资料
型号: ADG5409BRUZ
厂商: Analog Devices Inc
文件页数: 3/24页
文件大小: 0K
描述: IC MULTIPLEXER DUAL 4X1 16TSSOP
标准包装: 96
功能: 多路复用器
电路: 2 x 4:1
导通状态电阻: 16 欧姆
电压电源: 单/双电源
电压 - 电源,单路/双路(±): 9 V ~ 40 V,±9 V ~ ±22 V
电流 - 电源: 80µA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
Data Sheet
ADG5408/ADG5409
Rev. C | Page 11 of 24
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
VSS
S1A
S4A
S3A
S2A
A0
GND
VDD
S1B
S4B
DA
DB
S3B
S2B
A1
ADG5409
TOP VIEW
(Not to Scale)
09
20
6-
00
4
Figure 4. ADG5409 Pin Configuration (TSSOP)
1
VSS
2
S1A
3
S2A
4
S3A
11 S1B
12 VDD
10 S2B
9S3B
5
S
4
A
6
D
A
7
D
B
8
S
4
B
1
5
A
0
1
6
E
N
1
4
A
1
3
G
N
D
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILITY OF THE
SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, VSS.
092
06-
0
05
TOP VIEW
(Not to Scale)
ADG5409
Figure 5. ADG5409 Pin Configuration (LFCSP)
Table 10. ADG5409 Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic
Description
1
15
A0
Logic Control Input.
2
16
EN
Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3
1
VSS
Most Negative Power Supply Potential. In single-supply applications, this pin can be connected
to ground.
4
2
S1A
Source Terminal 1A. This pin can be an input or an output.
5
3
S2A
Source Terminal 2A. This pin can be an input or an output.
6
4
S3A
Source Terminal 3A. This pin can be an input or an output.
7
5
S4A
Source Terminal 4A. This pin can be an input or an output.
8
6
DA
Drain Terminal A. This pin can be an input or an output.
9
7
DB
Drain Terminal B. This pin can be an input or an output.
10
8
S4B
Source Terminal 4B. This pin can be an input or an output.
11
9
S3B
Source Terminal 3B. This pin can be an input or an output.
12
10
S2B
Source Terminal 2B. This pin can be an input or an output.
13
11
S1B
Source Terminal 1B. This pin can be an input or an output.
14
12
VDD
Most Positive Power Supply Potential.
15
13
GND
Ground (0 V) Reference.
16
14
A1
Logic Control Input.
EP
Exposed
Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 11. ADG5409 Truth Table
A1
A0
EN
On Switch Pair
X
0
None
0
1
0
1
2
1
0
1
3
1
4
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