参数资料
型号: ADG5434BRUZ
厂商: Analog Devices Inc
文件页数: 11/24页
文件大小: 0K
描述: IC SWITCH QUAD SPST 20TSSOP
标准包装: 75
功能: 开关
电路: 4 x SPDT - NC/NO
导通状态电阻: 16 欧姆
电压电源: 单/双电源
电压 - 电源,单路/双路(±): 9 V ~ 40 V,±9 V ~ ±22 V
电流 - 电源: 80µA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 管件
Data Sheet
ADG5433/ADG5434
Rev. C | Page 19 of 24
TRENCH ISOLATION
In the ADG5433/ADG5434, an insulating oxide layer (trench)
is placed between the NMOS and the PMOS transistors of each
CMOS switch. Parasitic junctions, which occur between the
transistors in junction isolated switches, are eliminated, and the
result is a completely latch-up proof switch.
In junction isolation, the N and P wells of the PMOS and
NMOS transistors form a diode that is reverse-biased under
normal operation. However, during overvoltage conditions, this
diode can become forward-biased. A silicon controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
significant amplification of the current that, in turn, leads to
latch-up. With trench isolation, this diode is removed, and the
result is a latch-up proof switch.
Figure 36. Trench Isolation
09207-
032
NMOS
PMOS
P-WELL
N-WELL
BURIED OXIDE LAYER
HANDLE WAFER
TRENCH
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