参数资料
型号: ADL5357ACPZ-WP
厂商: ANALOG DEVICES INC
元件分类: 混频器
英文描述: 500 MHz to 1700 MHz Balanced Mixer with LO Buffer, IF Amp, and RF Balun; Package: LFCSP: Leadform Chip Scale; No of Pins: 20; Temperature Range: Ind
中文描述: 500 MHz - 1700 MHz RF/MICROWAVE DOUBLE BALANCED MIXER
封装: 5 X 5 MM, ROHS COMPLIANT, CP-20-5, MO-220-VHHC, LFCSP-20
文件页数: 14/24页
文件大小: 587K
代理商: ADL5357ACPZ-WP
ADL5357
Rev. 0 | Page 21 of 24
Table 9. Evaluation Board Configuration
Components
Description
Default Conditions
C2, C6, C8, C18, C19,
C20, C21
Power Supply Decoupling. Nominal supply decoupling consists of
a 10 μF capacitor to ground in parallel with a 10 pF capacitor to
ground positioned as close to the device as possible.
C2 = 10 μF (size 0603),
C6, C8, C20, C21 = 10 pF (size 0402),
C18, C19 = 100 pF (size 0402)
C1, C4, C5
RF Input Interface. The input channels are ac-coupled through C1.
C4 and C5 provide bypassing for the center taps of the RF input baluns.
C1 = 8 pF (size 0402), C4 = 10 pF (size 0402),
C5 = 0.01 μF (size 0402)
T1, C17, L4, L5,
R1, R24, R25
IF Output Interface. The open-collector IF output interfaces are
biased through pull-up choke inductors L4 and L5. T1 is a 4:1
impedance transformer used to provide a single-ended IF output
interface, with C17 providing center-tap bypassing. Remove R1 for
balanced output operation.
T1 = TC4-1W+ (Mini-Circuits),
C17 = 150 pF (size 0402),
L4, L5 = 470 nH (size 1008),
R1, R24, R25 = 0 Ω (size 0402)
C10, C12, R4
LO Interface. C10 and C12 provide ac coupling for the LO1_IN and
LO2_IN local oscillator inputs. LOSEL selects the appropriate LO
input for both mixer cores. R4 provides a pull-down to ensure that
LO1_IN is enabled when the LOSEL test point is logic low.
LO2_IN is enabled when LOSEL is pulled to logic high.
C10, C12 = 22 pF (size 0402),
R4 = 10 kΩ (size 0402)
R21
PWDN Interface. R21 pulls the PWDN logic low and enables the
device. The PWR_UP test point allows the PWDN interface to be
exercised using the external logic generator. Grounding the
PWDN pin for nominal operation is allowed. Using the PWDN pin
when supply voltages exceed 3.3 V is not allowed.
R21 = 10 kΩ (size 0402)
C22, L3, R9, R14, R22,
R23, VGS0, VGS1
Bias Control. R22 and R23 form a voltage divider to provide 3 V
for logic control, bypassed to ground through C22. VGS0 and VGS1
jumpers provide programmability at the VGS0 and VGS1 pins. It is
recommended to pull these two pins to ground for nominal
operation. R9 sets the bias point for the internal LO buffers.
R14 sets the bias point for the internal IF amplifier.
C22 = 1 nF (size 0402), L3 = 0 Ω (size 0603),
R9 = 1.1 kΩ (size 0402), R14 = 910 Ω (size 0402),
R22 = 10 kΩ (size 0402), R23 = 15 kΩ (size 0402),
VGS0 = VGS1 = 3-pin shunt
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