参数资料
型号: ADM1027ARQ
厂商: ON Semiconductor
文件页数: 37/56页
文件大小: 1822K
描述: IC THER CTRL VOLT/MONITOR 24QSOP
产品变化通告: MFG CHG Notification ADI to ON Semi
Product Discontinuation Notice 25/Aug/2008
标准包装: 56
系列: dBCool®
功能: 风扇控制,温度监控器
传感器类型: 内部和外部
感应温度: 0°C ~ 105°C,外部传感器
精确度: ±1°C
拓扑: ADC,比较器,风扇速度计数器,多路复用器,寄存器库
输出类型: SMBus?
输出警报:
输出风扇:
电源电压: 3 V ~ 5.5 V
工作温度: 0°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 管件
REV. A
ADM1027
37
Enabling Acoustic Enhancement for Each PWM Output
ENHANCED ACOUSTICS REGISTER 1 (Reg. 0x62)
<3> = 1 enables acoustic enhancement on PWM1 output.
ENHANCED ACOUSTICS REGISTER 2 (Reg. 0x63)
<7> = 1 enables acoustic enhancement on PWM2 output.
<3> = 1 enables acoustic enhancement on PWM3 output.
Effect of Ramp Rate on Enhanced Acoustics Mode
The PWM signal driving the fan will have a period, T, given by
the PWM drive frequency, f, since T = 1/f. For a given PWM
period, T, the PWM period is subdivided into 255 equal time
slots. One time slot corresponds to the smallest possible incre-
ment in PWM duty cycle. A PWM signal of 33% duty cycle will
thus be high for 1/3 255 time slots and low for 2/3 255
time slots. Therefore, 33% PWM duty cycle corresponds to a
signal that is high for 85 time slots and low for 170 time slots.
170
TIME SLOTS
85
TIME SLOTS
PWM OUTPUT
(ONE PERIOD)
= 255 TIME SLOTS
PWM_OUT
33% DUTY
CYCLE
Figure 38. 33% PWM Duty Cycle Represented in Time Slots
The ramp rates in enhanced acoustics mode are selectable
between 1, 2, 3, 5, 8, 12, 24, and 48. The ramp rates are actu-
ally discrete time slots. For example, if the ramp rate = 8, then
eight time slots will be added to the PWM high duty cycle each
time the PWM duty cycle needs to be increased. If the PWM
duty cycle value needs to be decreased, it will be decreased by
eight time slots. Figure 39 shows how the enhanced acoustics
mode algorithm operates.
READ
TEMPERATURE
CALCULATE
NEW PWM
DUTY CYCLE
IS NEW PWM
VALUE >
PREVIOUS
VALUE?
INCREMENT
PREVIOUS
PWM VALUE
BY RAMP
RATE
YES
NO
DECREMENT
PREVIOUS
PWM VALUE
BY RAMP
RATE
Figure 39. Enhanced Acoustics Algorithm
The enhanced acoustics mode algorithm calculates a new PWM
duty cycle based on the temperature measured. If the new
PWM duty cycle value is greater than the previous PWM value,
then the previous PWM duty cycle value is incremented by
either 1, 2, 3, 5, 8, 12, 24, or 48 time slots (depending on the
settings of the enhanced acoustics registers). If the new PWM
duty cycle value is less than the previous PWM value, then the
previous PWM duty cycle is decremented by 1, 2, 3, 5, 8, 12, 24,
or 48 time slots. Each time the PWM duty cycle is incremented
or decremented, it is stored as the previous PWM duty cycle for
the next comparison.
A ramp rate of 1 corresponds to one time slot, which is 1/255 of
the PWM period. In enhanced acoustics mode, incrementing or
decrementing by 1 changes the PWM output by 1/255 100%.
It is important to note that when using the enhanced acoustics
mode, the fan spin-up should be disabled.
Rev. 3 | Page 37 of 56 | www.onsemi.com
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