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参数资料
| 型号： | ADM1031ARQZ |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/32页 |
| 文件大小： | 0K |
| 描述： | IC SENSOR 2-TEMP/FAN CTRL 16QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi Product Discontinuation 30/Sept/2011 |
| 标准包装： | 98 |
| 功能： | 风扇控制，温度监控器 |
| 传感器类型： | 内部和外部 |
| 感应温度： | 0°C ~ 100°C，外部传感器 |
| 精确度： | ±1°C 本地，±0.5°C 远程 |
| 拓扑： | ADC，比较器，多路复用器，寄存器库 |
| 输出类型： | SMBus? |
| 输出警报： | 是 |
| 输出风扇： | 是 |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | 0°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 管件 |
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ADM1031
during the high period, as a low-to-high transition
when the clock is high can be interpreted as a stop
signal. The number of data bytes that can be
transmitted over the serial bus in a single read or
write operation is limited only by what the master
and slave devices can handle.
3. When all data bytes have been read or written,
stop conditions are established. In write mode, the
master pulls the data line high during the tenth
clock pulse to assert a stop condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as No Acknowledge. The master
then takes the data line low during the low period
before the tenth clock pulse, then high during the
tenth clock pulse to assert a stop condition.
Any number of bytes of data can be transferred over the
serial bus in one operation, but it is not possible to mix read
and write in one operation, because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation.
In the case of the ADM1031, write operations contain
either one byte or two bytes, and read operations contain one
byte, and perform the functions described next.
Writing Data to a Register
To write data to one of the device data registers or read
data from it, the address pointer register must be set so that
the correct data register is addressed; data can then be
written to that register or read from it. The first byte of a
write operation always contains an address that is stored in
the address pointer register. If data is to be written to the
device, the write operation contains a second data byte that
is written to the register selected by the address pointer
register.
This is illustrated in Figure 15. The device address is sent
over the bus followed by R/W set to 0. This is followed by
two data bytes. The first data byte is the address of the
internal data register to be written to, which is stored in the
address pointer register. The second data byte is the data to
be written to the internal data register.
Reading Data from a Register
When reading data from a register there are two
possibilities:
1. If the ADM1031’s address pointer register value is
unknown or not the desired value, it is first
necessary to set it to the correct value before data
can be read from the desired data register. This is
done by performing a write to the ADM1031 as
before, but only the data byte containing the
register address is sent, as data is not to be written
to the register. This is shown in Figure 16.
A read operation is then performed consisting of
the serial bus address, R/W bit set to 1, followed
by the data byte read from the data register. This is
shown in Figure 17.
2. If the address pointer register is known to be
already at the desired address, data can be read
from the corresponding data register without first
writing to the address pointer register, so Figure 16
can be omitted.
NOTES:
1. Although it is possible to read a data byte from a data
register without first writing to the address pointer register,
if the address pointer register is already at the correct value,
it is not possible to write data to a register without writing to
the address pointer register. This is because the first data
byte of a write is always written to the address pointer
register.
2. In Figure 15, Figure 16, and Figure 17, the serial bus
address is shown as the default value 01011(A1)(A0),
where A1 and A0 are set by the three-state ADD pin.
3. The ADM1031 also supports the Read Byte protocol, as
described in the system management bus specification.
1
9
1
9
SCL
SDA
0
1
0
1
1
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
ACK. BY
ADM1031
FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADM1031
SCL (CONTINUED)
1
9
SDA (CONTINUED)
D7
D6
D5
D4
D3
D2
D1
D0
FRAME 3
DATA BYTE
Figure 15. Writing a Register Address to the Address Pointer Register,
then Writing Data to the Selected Register
http://onsemi.com
8
ACK. BY
ADM1031
STOP BY
MASTER
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