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参数资料
| 型号： | ADM1041ARQZ-RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/64页 |
| 文件大小： | 0K |
| 描述： | IC SECONDARY SIDE CTRLR 24QSOP |
| 标准包装： | 1,000 |
| 应用： | 电源，服务器 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 电源： | 6mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 24-QSOP |
| 包装： | 带卷 (TR) |
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ADM1041
Parameter
DC Offset Trim Range (with respect to input)
Min
Typ
?8
Max
Unit
mV
Test Conditions/Comments
?15
?30
8
15
30
mV
mV
mV
mV
mV
DC Offset Trim Step Size
(with respect to input)
30
50
120
μV
μV
μV
V CM = 2.0 V, V DIFF = 0 V
8 bits, 255 steps
CURRENT SENSE CALIBRATION
Total Current Sense Error 2
(Gain and Offset)
V CSCM = 2.0V, 0°C ≤ T A ≤ 85 O C SHRS =
SHRO = 2 V. Gain = 230x
Gain Range (I SENSE )
±3
±6
%
%
Chopper ON
Chopper OFF
Input voltage range at C S +, C S ?
Gain Setting 1 (Reg 16h[2:0] = 000)
Gain Setting 2 (Reg 16h[2:0] = 001)
Gain Setting 3 (Reg 16h[2:0] = 010)
Gain Setting 4 (Reg 16h[2:0] = 100)
Gain Setting 5 (Reg 16h[2:0] = 101)
Gain Setting 6 (Reg 16h[2:0] = 110)
Full Scale (No Offset)
Attenuation Range
Current Share Trim Step (at SHRO)
65
85
110
135
175
230
2.0
65 to 99
0.4
8
V/V
V/V
V/V
V/V
V/V
V/V
V
%
%
mV
34.0 mV – 44.5 mV. Gain = 65×
26.0 mV – 34.0 mV. Gain = 85×
20.0 mV – 26.0 mV. Gain = 110×
16.0 mV – 20.0 mV. Gain = 135×
12.0 mV – 16.0 mV. Gain = 175×
9.5 mV – 12.0 mV. Gain = 230×
V ZO = 0
SHRS = SHRO = 1 V
7 bits, 127 steps I SHARE slope
Gain Accuracy 2, 4 , 40 mV at C S +, C S ?
?5
+5
%
0 V ≤ V CSCM ≤ 0.3 V. Gain = 65×
V CSCM = Input Common Mode
Gain Accuracy 2, 4 , 20 mV at C S +, C S ?
?5
±1
+5
%
V CSCM = 2.0V, 0°C ≤ T A ≤ 85°C
Gain = 135×
Gain Accuracy 2, 4 , 40 mV at C S +, C S –
?2.5
±0.5
+2.5
%
V CSCM = 2.0 V, 0°C ≤ T A ≤ 85°C
Gain = 65×
SHARE BUS OFFSET
Current Share Offset Range
1.25
V
Zero Current Offset Trim Step
0 ≤ V TRIM ≤ 1.25 V
CURRENT TRANSFORMER SENSE INPUT, I CT
0.4
5.5
%
mV
8 bits, 255 steps, V CT = 1.0 V
Gain Setting 0
Gain Setting 1
4.5
2.57
V/V
V/V
Reg 17h[5] = 0, V SHARE = 2 V. Table 31
Reg 15h = 05h, approx 1 μA.
See Table 30. V SHARE = 2 V.
CT Input Sensitivity
CT Input Sensitivity
Input Impedance 2
Source Current
0.45
0.79
20
0.5
1.0
50
2.0
0.68
1.20
V
V
k?
μA
Gain setting = 4.5
Gain setting = 2.57
Section.
Source Current Step Size
170
nA
15 steps Reg 15h[3:0].
Reverse Current for Extended SMBus
3.5
5
7
mA
See Figure 38. See Absolute
Addressing (Source Current) 5
Rev. A | Page 8 of 64
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