参数资料
型号: ADM1232ANZ
厂商: Analog Devices Inc
文件页数: 6/12页
文件大小: 0K
描述: IC SUPERVISOR FOR CPU 8DIP
标准包装: 50
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极,推挽式
复位: 高有效/低有效
复位超时: 最小为 250 ms
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
产品目录页面: 799 (CN2011-ZH PDF)

ADM1232
CIRCUIT INFORMATION
PB RESET
The PB RESET input makes it possible to manually reset a
system using either a standard push-button switch or a logic
low input. An internal debounce circuit provides glitch
immunity when used with a switch, reducing the effects of
STROBE TIMEOUT SELECTION
TD (time delay) set is used to set the strobe timeout period. The
strobe timeout period is the maximum time between high-to-
low transitions that STROBE accepts before a reset is asserted
(see Figure 8 ). The strobe timeout settings are listed in Table 5 .
glitches on the line. The debounce circuit is guaranteed to cause
the ADM1232 to assert a reset if PB RESET is brought low for
more than 20 ms and is guaranteed to ignore low inputs of less
than 1 ms.
V CC
V CC
TD
ADM1232
MICROPROCESSOR
STROBE
I/O
Table 5. Strobe Timeout Settings
Condition Min Typ
TD = 0 V 62.5 150
TD = Floating 250 600
TD = V CC 500 1200
STROBE
PULSE WIDTH
Max
250
1000
2000
Unit
ms
ms
ms
PB RESET
GND
RESET
TOLERANCE
RESET
STROBE
STROBE TIMEOUT PERIOD
Figure 6. Typical Push-Button Reset Application
Figure 8. STROBE Parameters
PB RESET TIME
V CC
5V
4.5V (5% TRIP POINT)
5V
PB RESET
V IL
PB RESET
DELAY
V IH
RESET ACTIVE
TIME
RESET OUTPUT DELAY
W HEN V CC IS FALLING
RESET
4.25V (10% TRIP POINT)
RESET OUTPUT DELAY
WHEN V CC IS RISING
RESET
RESET
Figure 9. Reset Output Delay
RESET
Figure 7. PB RESET
TOLERANCE
The TOLERANCE input is used to determine the level at which
V CC can vary below 5 V without the ADM1232 asserting a reset.
Connecting TOLERANCE to GND selects a ?5% tolerance level
and causes the ADM1232 to generate a reset if V CC falls below
4.75 V. If TOLERANCE is connected to V CC , a ?10% tolerance
level is selected, which causes the ADM1232 to generate a reset
if V CC falls below 4.5 V. See the parameters for the V CC trip point
in the Specifications section for more information.
RESET AND RESET OUTPUTS
RESET is capable of sourcing and sinking current, whereas
RESET is an open-drain MOSFET that sinks current only.
Therefore, it is necessary to pull this output high.
Rev. C | Page 6 of 12
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