参数资料
型号: ADM13305-4ARZRL7
厂商: Analog Devices Inc
文件页数: 10/12页
文件大小: 0K
描述: IC SUPERVISR DUAL 3.3/ADJ 8SOIC
产品培训模块: Voltage Supervisor 101
标准包装: 1,000
类型: 多压监控器
监视电压数目: 2
输出: 推挽式,图腾柱
复位: 高有效/低有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.93V,可调
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 带卷 (TR)

ADM13305
THEORY OF OPERATION
The ADM13305 is a dual voltage supervisor designed to
monitor two supplies and provide a reset signal to DSP and
microprocessor-based systems.
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
SENSEv
V (NOM)
V IT–
t
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There is also
an adjustable input option with an undervoltage threshold of 0.6 V.
The ADM13305-18, ADM13305-25, and ADM13305-33 have
RESET
1
two internally fixed thresholds, while the ADM13305-4 and
ADM13305-5 offer one internally fixed threshold and one
externally programmable threshold via a resistor string. See
0
t d
t d
t
the Ordering Guide for a list of all available options.
INPUT CONFIGURATION
The ADM13305 is powered through V DD . To increase noise
immunity in noisy applications, place a 0.1 μF capacitor
between the V DD input and ground.
The SENSEv inputs are resistant to short power supply glitches.
Do not allow an unused SENSEv input to float or to be grounded,
instead connect it to a supply voltage greater than its specified
threshold voltage.
Typically, the threshold voltage at each adjustable SENSEv input
is 0.6 V. To monitor a voltage greater than 0.6 V, connect a resistor
divider network to the device as depicted in Figure 13, where,
Figure 14. Reset Timing Diagram
Once the supplies monitored at the SENSEv pins rise above
their associated threshold level, the RESET signal remains low
for the reset timeout period before deasserting. Subsequently, if
either of the supplies monitored by the SENSEv pins falls below
its associated threshold the RESET output reasserts.
The ADM13305 features both an active-low, push-pull RESET
output and an active-high, push-pull RESET output.
WATCHDOG TIMER
The ADM13305 features a watchdog timer that monitors
microprocessor activity. A timer circuit is cleared with every
low-to-high or high-to-low logic transition on the watchdog
V MONITERED = 0 . 6 V ? ?
R1 + R2 ?
?
?
R2
?
input pin (WDI). If the timer counts through the preset
watchdog timeout period of 1.6 sec, RESET is asserted, as
shown in Figure 15 .
MONITORED VOLTAGE
R1
R2
V REF = 0.6V
Figure 13. Setting the Adjustable Monitor
RESET OUTPUT
The microprocessor is required to toggle the WDI pin to avoid
being reset. Therefore, failure of the microprocessor to toggle
WDI within the timeout period indicates a code execution error
and the reset pulse generated restarts the microprocessor in a
known state. The watchdog timer can be disabled by leaving
WDI floating.
WDI
1
t WD
The reset outputs are guaranteed to be in the correct state for
0
t
V DD down to 1.1 V. During power-up, RESET is asserted when
the supply voltage becomes greater than 1.1 V.
RESET
1
0
t
t d
Figure 15. Watchdog Timing Diagram
Rev. 0 | Page 10 of 12
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