参数资料
型号: ADM2490EBRWZ
厂商: ANALOG DEVICES INC
元件分类: 通用总线功能
英文描述: High Speed, ESD-Protected, Full-Duplex, iCoupler, Isolated RS-485 Transceiver
中文描述: LINE TRANSCEIVER, PDSO16
封装: ROHS COMPLIANT, MS-103AA, SOIC-16
文件页数: 15/16页
文件大小: 470K
代理商: ADM2490EBRWZ
ADM2490E
APPLICATIONS INFORMATION
ISOLATED POWER-SUPPLY CIRCUIT
The ADM2490E requires isolated power capable of 5 V at up to
approximately 75 mA (this current is dependant on the data
rate and termination resistors used) to be supplied between the
V
DD2
and the GND
2
pins. A transformer-driver circuit with a
center-tapped transformer and LDO can be used to generate the
isolated 5 V supply, as shown in Figure 25. The center-tapped
transformer provides electrical isolation of the 5 V power
supply. The primary winding of the transformer is excited with
a pair of square waveforms that are 180° out of phase with each
other. A pair of Schottky diodes and a smoothing capacitor are
used to create a rectified signal from the secondary winding.
The
ADP667
linear voltage regulator provides a regulated
power supply to the bus-side circuitry (V
DD2
) of the
ADM2490E.
PC BOARD LAYOUT
The ADM2490E isolated RS-485 transceiver requires no
external interface circuitry for the logic interfaces. Power-
supply bypassing is required at the input and output supply pins
(Figure 24). Bypass capacitors are conveniently connected
between Pins 1 and 2 for V
DD1
and between Pins 15 and 16 for
Rev. 0 | Page 15 of 16
V
DD2
. The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor and
the input power-supply pin should not exceed 20 mm.
Bypassing between Pins 1 and 8 and between Pins 9 and 16
should also be considered unless the ground pair on each
package side is connected close to the package.
V
DD1
GND
1
RxD
NC
GND
1
TxD
NC
GND
1
V
DD2
GND
2
A
B
NC
Z
Y
GND
2
NC = NO CONNECT
ADM2490E
0
Figure 24. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isola-
tion barrier is minimized. Furthermore, the board layout should
be designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the absolute
maximum ratings of the device, thereby leading to latch-up or
permanent damage.
ISOLATION
BARRIER
V
CC
78253
SD103C
SD103C
22μF
10μF
5V
OUT
IN
SET GND SHDN
V
CC
V
DD1
V
DD2
GND
1
GND
2
TRANSFORMER
DRIVER
V
CC
ADP667
ADM2490E
0
Figure 25. Isolated Power-Supply Circuit
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