ADM3202/ADM3222/ADM1385
Rev. E | Page 8 of 16
GENERAL DESCRIPTION
The ADM3202/ADM3222/ADM1385 are RS-232 line drivers/
receivers. Step-up voltage converters coupled with level-shifting
transmitters and receivers allow RS-232 levels to be developed
while operating from a single 3.3 V supply.
CMOS technology is used to keep the power dissipation to an
absolute minimum, allowing maximum battery life in portable
applications.
The ADM3202/ADM3222/ADM1385 are modifications,
enhancements, and improvements of the AD230 to AD241
family and derivatives. They are essentially plug-in compatible
and do not have any materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of these main sections:
A charge pump voltage converter
3.3 V logic to EIA-232 transmitters
EIA-232 to 5 V logic receivers
Charge Pump DC to DC Voltage Converter
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±6.6 V supply from the input 3.3 V level. This is done in two
stages by using a switched capacitor technique as illustrated in
to 6.6 V by using Capacitor C1 as the charge storage element.
The +6.6 V level is then inverted to generate 6.6 V using C2
as the storage element. C3 is shown connected between V+ and
VCC but is equally effective if connected between V+ and GND.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be increased, if desired.
Capacitor C3 is shown connected between V+ and VCC. It is
also acceptable to connect this capacitor between V+ and GND.
If desired, larger capacitors (up to 10 μF) can be used for
Capacitors C1 to C4.
C1+
C2+
C1–
C2–
VCC
V–
V+
T1IN
T1OUT
T2IN
T2OUT
R1OUT
R1IN
R2OUT
R2IN
CMOS
INPUTS
EIA/TIA-232
OUTPUTS
CMOS
OUTPUTS
EIA/TIA-232
INPUTS*
T1
T2
R1
R2
+
0.1F
10V
0.1F
10V
GND ADM3202
C3
0.1F
6.3V
+3.3V INPUT
+3.3V TO +6.6V
VOLTAGE
DOUBLER
+6.6V TO –6.6V
VOLTAGE
INVERTER
C5
0.1F
+
C4
0.1F
10V
+
*INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
00
07
1-
01
5
Figure 15. ADM3202 Typical Operating Circuit
C1+
C2+
C1–
C2–
VCC
V–
V+
T1IN
T1OUT
T2IN
T2OUT
R1OUT
R1IN
R2OUT
EN
R2IN
SD
CMOS
INPUTS
EIA/TIA-232
OUTPUTS
CMOS
OUTPUTS
EIA/TIA-232
INPUTS*
T1
T2
R1
R2
+
0.1F
10V
0.1F
10V
GND
ADM3222
C3
0.1F
6.3V
+3.3V INPUT
+3.3V TO +6.6V
VOLTAGE
DOUBLER
+6.6V TO –6.6V
VOLTAGE
INVERTER
C5
0.1F
+
C4
0.1F
10V
+
*INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
00
07
1-
01
6
Figure 16. ADM3222 Typical Operating Circuit
C1+
C2+
C1–
C2–
VCC
V–
V+
T1IN
T1OUT
T2IN
T2OUT
R1OUT
R1IN
R2OUT
DD
R2IN
SD
CMOS
INPUTS
EIA/TIA-232
OUTPUTS
CMOS
OUTPUTS
EIA/TIA-232
INPUTS*
T1
T2
R1
R2
+
0.1F
10V
0.1F
10V
GND
ADM1385
+3.3V INPUT
+3.3V TO +6.6V
VOLTAGE
DOUBLER
+6.6V TO –6.6V
VOLTAGE
INVERTER
C5
0.1F
+
*INTERNAL 5k PULL-DOWN RESISTOR
ON EACH RS-232 INPUT
00
071-
01
7
C3
0.1F
10V
C4
0.1F
10V
Figure 17. ADM1385 Typical Operating Circuit
C1
+
C3
+
S3
S4
S1
S2
INTERNAL
OSCILLATOR
VCC
GND
VCC
V+ = 2VCC
00071-018
Figure 18. Charge Pump Voltage Doubler
C2
+
C4
+
S3
S4
S1
S2
INTERNAL
OSCILLATOR
V+
GND
V– = –(V+)
GND
FROM
VOLTAGE
DOUBLER
00071-019
Figure 19. Charge Pump Voltage Inverter