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参数资料
| 型号： | ADM3493 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | 3.3 V Slew Rate Limited, Half Duplex RS-485/RS-422 Transceiver |
| 中文描述： | 3.3伏摆率限制，半双工RS-485/RS-422收发器 |
| 文件页数： | 7/12页 |
| 文件大小： | 233K |
| 代理商： | ADM3493 |
ADM3493
TEST CIRCUITS
Rev. 0 | Page 7 of 12
R
L
/2
R
L
/2
V
OC
A
B
V
OD
0
Figure 3. Driver V
OD
and V
OC
V
=
–7V TO +12V
V
CC
R
L
375
375
V
OD
D
0
Figure 4. Driver V
OD
with Varying Common-Mode Voltage
0
I
OH
(–)
I
OL
(+)
V
OH
V
OL
R
0
V
ID
Figure 5. Receiver V
OH
and V
OL
D
GENERATOR
1
V
CC
50
C
L
R
L
=
60
C
L
= 15pF
2
0
OUT
1
PPR = 250kHz, 50% DUTY CYCLE,
t
≤
6.0ns, Z
= 50
.
2
C
L
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 6. Driver Differential Output Delay and Transition Times
D
V
OM
R
L
= 27
OUT
C
L
= 15pF
2
GENERATOR
1
V
CC
50
S1
V
OM
=
V
OH
+ V
OL
2
≈
1.5V
0
1
PPR = 250kHz, 50% DUTY CYCLE,
t
≤
6.0ns, Z
= 50
.
2
C
L
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 7. Driver Propagation Delays
D
OUT
C
L
= 50pF
2
GENERATOR
1
50
S1
V
OM
=
V
OH
+ V
OL
2
≈
1.5V
R
L
= 110
0V OR 3V
0
1
PPR = 250kHz, 50% DUTY CYCLE,
t
≤
6.0ns, Z
= 50
.
2
C
L
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 8. Driver Enable and Disable Times (t
PZH
, t
PSH
, t
PHZ
)
D
OUT
C
L
= 50pF
2
GENERATOR
1
50
S1
0V OR 3V
V
CC
R
L
= 110
0
1
PPR = 250kHz, 50% DUTY CYCLE,
t
≤
6.0ns, Z
= 50
.
2
C
L
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 9. Driver Enable and Disable Times (t
PZL
, t
PSL
, t
PLZ
)
0
GENERATOR
1
50
C
L
= 15pF
2
R
1.5V
0
V
OM
=
V
CC
2
OUT
V
ID
1
PPR = 250kHz, 50% DUTY CYCLE,
t
≤
6.0ns, Z
= 50
.
2
C
L
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 10. Receiver Propagation Delay
R
GENERATOR
1
50
C
L2
S3
S1
S2
V
CC
+1.5V
–1.5V
V
ID
1k
0
1
PPR = 250kHz, 50% DUTY CYCLE,
t
≤
6.0ns, Z
= 50
.
2
C
L
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 11. Receiver Enable and Disable Times
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