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参数资料
| 型号： | ADM3493ARZ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | 通用总线功能 |
| 英文描述： | 3.3 V Slew Rate Limited, Half Duplex RS-485/RS-422 Transceiver |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封装： | LEAD FREE, MS-012AA, SOIC-8 |
| 文件页数： | 4/12页 |
| 文件大小： | 233K |
| 代理商： | ADM3493ARZ |
ADM3493
TIMING SPECIFICATIONS
V
CC
= 3.3 V, T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter
DRIVER
Differential Output Delay, t
DD
Differential Output Transition Time, t
TD
Propagation Delay, Low-to-High Level, t
PLH
Propagation Delay, High-to-Low Level, t
PHL
|t
PLH
– t
PHL
| Propagation Delay Skew
1
, t
PDS
DRIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, t
PZL
Output Enable Time to High Level, t
PZH
Output Disable Time from High Level, t
PHZ
Output Disable Time from Low Level, t
PLZ
Output Enable Time from Shutdown to
Low Level, t
PSL
Output Enable Time from Shutdown to
High Level, t
PSH
RECEIVER
Time to Shutdown
2
, t
SHDN
Propagation Delay, Low-to-High Level, t
RPLH
Rev. 0 | Page 4 of 12
Min
600
400
700
700
Typ
900
700
1000
1000
100
Max
1400
1200
1500
1500
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
Test Conditions/Comments
R
L
= 60 Ω
(
see
Figure 6 and Figure 12)
R
L
= 60 Ω
(
see
Figure 6 and Figure 12)
R
L
= 27 Ω
(
see Figure 7 and Figure 13)
R
L
= 27 Ω
(
see Figure 7 and Figure 13)
R
L
= 27 Ω (see Figure 7 and Figure 13)
R
L
= 110 Ω
(
see Figure 9 and Figure 15)
R
L
= 110 Ω
(
see Figure 8 and Figure 14)
R
L
= 110 Ω
(
see Figure 8 and Figure 14)
R
L
= 110 Ω
(
see Figure 9 and Figure 15)
R
L
= 110 Ω
(
see Figure 9 and Figure 15)
900
600
50
50
1.9
1300
800
80
80
2.7
2.2
3.0
μs
R
L
= 110 Ω
(
see Figure 8 and Figure 14)
80
25
190
75
300
180
ns
ns
V
ID
= 0 V to 3.0 V, C
L
= 15 pF (see Figure 10
and Figure 16)
V
ID
= 0 V to 3.0 V, C
L
= 15 pF (see Figure 10
and Figure 16)
V
ID
= 0 V to 3.0 V, C
L
= 15 pF (see Figure 10
and Figure 16)
C
L
= 15 pF (see Figure 11 and Figure 17)
C
L
= 15 pF (see Figure 11 and Figure 17)
C
L
= 15 pF (see Figure 11 and Figure 17)
C
L
= 15 pF (see Figure 11 and Figure 17)
C
L
= 15 pF (see Figure 11 and Figure 17)
Propagation Delay, High-to-Low Level, t
RPHL
25
75
180
ns
|t
PLH
– t
PHL
| Propagation Delay Skew, t
RPDS
50
ns
RECEIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, t
PRZL
Output Enable Time to High Level, t
PRZH
Output Disable Time from High Level, t
PRHZ
Output Disable Time from Low Level, t
PRLZ
Output Enable Time from Shutdown to
Low Level, t
PRSL
Output Enable Time from Shutdown to
High Level, t
PRSH
1
Measured on |t
PLH
(A) t
PHL
(A)| and |t
PLH
(B) t
PHL
(B)|.
2
The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 300 ns, the parts are guaranteed to enter shutdown.
25
25
25
25
720
50
50
45
45
1400
ns
ns
ns
ns
ns
720
1400
ns
C
L
= 15 pF (see Figure 11 and Figure 17)
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