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参数资料
型号： ADM4850ARZ
厂商： Analog Devices Inc
文件页数： 12/16页
文件大小： 0K
描述： IC TXRX RS485/422 115KBPS 8-SOIC
标准包装： 98
类型： 收发器
驱动器/接收器数： 1/1
规程： RS422，RS485
电源电压： 4.75 V ~ 5.25 V
安装类型： 表面贴装
封装/外壳： 8-SOIC（0.154"，3.90mm 宽）
供应商设备封装： 8-SO
包装： 管件
产品目录页面： 790 (CN2011-ZH PDF)
ADM4850/ADM4851/ADM4852/ADM4853/ADM4854/ADM4855/ADM4856/ADM4857
Rev. D | Page 5 of 16
ADM4852/ADM4856 TIMING SPECIFICATIONS
VCC = 5 V ± 5%, TA = TMIN to TMAX, unless otherwise noted.
Table 5.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Maximum Data Rate
2.5
Mbps
Propagation Delay, tPLH, tPHL
50
180
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
Skew, tSKEW
50
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
Rise/Fall Times, tR, tF
140
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
Enable Time, tZH
180
ns
RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4852
Disable Time, tZL
180
ns
RL = 500 Ω, CL = 15 pF, see Figure 21, ADM4852
Enable Time from Shutdown
4000
ns
RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4852
RECEIVER
Propagation Delay, tPLH, tPHL
55
190
ns
CL = 15 pF, see Figure 22
Differential Skew, tSKEW
50
ns
CL = 15 pF, see Figure 22
Enable Time
5
50
ns
RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4852
Disable Time
20
50
ns
RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4852
Enable Time from Shutdown
4000
ns
RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4852
Time to Shutdown
50
330
3000
ns
ADM48521
1 The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
ADM4853/ADM4857 TIMING SPECIFICATIONS
VCC = 5 V ± 5%, TA = TMIN to TMAX, unless otherwise noted.
Table 6.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Maximum Data Rate
10
Mbps
Propagation Delay, tPLH, tPHL
0
30
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
Skew, tSKEW
10
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
Rise/Fall Times, tR, tF
30
ns
RLDIFF = 54 Ω, CL1 = CL2 = 100 pF, see Figure 20
Enable Time, tZH
35
ns
RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4853
Disable Time, tZL
35
ns
RL = 500 Ω, CL = 15 pF, see Figure 21, ADM4853
Enable Time from Shutdown
4000
ns
RL = 500 Ω, CL = 100 pF, see Figure 21, ADM4853
RECEIVER
Propagation Delay, tPLH, tPHL
55
190
ns
CL = 15 pF, see Figure 22
Differential Skew, tSKEW
30
ns
CL = 15 pF, see Figure 22
Enable Time
5
50
ns
RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4853
Disable Time
20
50
ns
RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4853
Enable Time from Shutdown
4000
ns
RL = 1 kΩ, CL = 15 pF, see Figure 23, ADM4853
Time to Shutdown
50
330
3000
ns
ADM48531
1 The half-duplex device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to
enter shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to enter shutdown mode.
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