参数资料
型号: ADM560JRS
厂商: ANALOG DEVICES INC
元件分类: 通用总线功能
英文描述: Ultralow Power, +3.3 V, RS-232 Notebook PC Serial Port Drivers/Receivers
中文描述: LINE TRANSCEIVER, PDSO28
封装: MO-150AH, SSOP-28
文件页数: 4/6页
文件大小: 246K
代理商: ADM560JRS
REV. 0
–4–
ADM560/ADM561
GENERAL DESCRIPTION
The ADM560/ADM561 are RS-232 transmission line drivers/
receivers which operate from a single +3.3 V supply. This is
achieved by integrating step up voltage converters and level
shifting transmitters and receivers onto the same chip. CMOS
technology is used to keep the power dissipation to an absolute
minimum. The ADM560/ADM561 is a modification, enhance-
ment and improvement to the AD230–AD241 family and
derivatives thereof. It is essentially plug-in compatible and does
not have materially different applications.
The ADM560/ADM561 contains an internal voltage doubler
and a voltage inverter which generates
±
6.6 V from the +3.3 V
input. Four external 1
μ
F capacitors are required for the internal
voltage converter.
CIRCUIT DESCRIPTION
The internal circuitry consists of three main sections. These
are:
1. A charge pump voltage converter
2. 3 V Logic to EIA-232 transmitters
3. EIA-232 to 3 V Logic receivers.
Charge Pump DC-DC Voltage Converter
The Charge Pump Voltage converter consists of an oscillator
and a switching matrix. The converter generates a
±
6.6 V sup-
ply from the input +3.3 V level. This is done in two stages using
a switched capacitor technique as illustrated below. First, the
3.3 V input supply is doubled to 6.6 V using capacitor C1 as the
charge storage element. The 6.6 V level is then inverted to gen-
erate –6.6 V using C2 as the storage element.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
Transmitter (Driver) Section
The Drivers convert 3 V or 5 V logic input levels into EIA-232
output levels. With V
CC
= +3.3 V and driving an EIA-232 load,
the output voltage swing is typically
±
5.5 V.
S1
S3
V+ = 2V
CC
S2
S4
INTERNAL
OSCILLATOR
C1
C3
V
CC
GND
V
CC
Figure 1. Charge Pump Voltage Doubler
S1
S3
S2
S4
INTERNAL
OSCILLATOR
C2
C4
V– = – (V+)
GND
V+
GND
FROM
VOLTAGE
DOUBLER
Figure 2. Charge Pump Voltage Inverter
Unused inputs may be left unconnected, as an internal 400 k
pull-up resistor pulls them high forcing the outputs into a low
state. The input pull-up resistors typically source 8
μ
A when
grounded so unused inputs should either be connected to V
CC
or left unconnected in order to minimize power consumption.
Receiver Section
The receivers are inverting level shifters which accept EIA-232
input levels and translate them into 3 V logic output levels.
The inputs have internal 5 k
pull-down resistors to ground
and are also protected against overvoltages of up to
±
25 V. The
guaranteed switching thresholds are 0.4 V minimum and 2.4 V
maximum. Unconnected inputs are pulled to 0 V by the internal
5 k
pull-down resistor. This, therefore, results in a Logic 1
output level for unconnected inputs or for inputs connected to
GND.
The receivers have schmitt trigger input with a hysteresis level
of 0.3 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
ENABLE AND SHUTDOWN
Table I shows the truth table for the enable and shutdown con-
trol signals. When disabled, all receivers are placed in a high
impedance state. In shutdown, all transmitters are disabled and
all receivers on the ADM561 are disabled. On the ADM560,
receivers R4 and R5 remain enabled in shutdown.
相关PDF资料
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