参数资料
型号: ADM660ARUZ-REEL
厂商: Analog Devices Inc
文件页数: 7/11页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 16TSSOP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 2,500
类型: 升压(升压),切换电容(充电泵),倍增器,反相
输出类型: 可调式
输出数: 1
输出电压: -1.5 V ~ -7 V,3 V ~ 14 V
输入电压: 1.5 V ~ 7 V
频率 - 开关: 25kHz,120kHz
电流 - 输出: 100mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-TSSOP

ADM660/ADM8660
160
60
140
50
120
100
40
80
60
LV = GND
FC = V+
30
V+ = +1.5V
40
C1, C2 = 2.2 F
20
V+ = +3V
20
10
V+ = +5V
0
–40
–20
0
20 40
60
80
100
0
–40
–20
0
20 40
60
80
100
TEMPERATURE – C
TPC 13. Charge-Pump Frequency vs. Temperature
GENERAL INFORMATION
The ADM660/ADM8660 is a switched capacitor voltage con-
verter that can be used to invert the input supply voltage. The
ADM660 can also be used in a voltage doubling mode. The
voltage conversion task is achieved using a switched capacitor
technique using two external charge storage capacitors. An on-
board oscillator and switching network transfers charge between
the charge storage capacitors. The basic principle behind the
voltage conversion scheme is illustrated in Figures 1 and 2.
TEMPERATURE – C
TPC 14. Output Resistance vs. Temperature
Switched Capacitor Theory of Operation
As already described, the charge pump on the ADM660/ADM8660
uses a switched capacitor technique in order to invert or double
the input supply voltage. Basic switched capacitor theory is
discussed below.
A switched capacitor building block is illustrated in Figure 3.
With the switch in position A, capacitor C1 will charge to voltage
V1. The total charge stored on C1 is q1 = C1V1. The switch is
then flipped to position B discharging C1 to voltage V2. The
S1
CAP+
S3
charge remaining on C1 is q2 = C1V2. The charge transferred
V+
S2
+
C1 S4
CAP–
+
C2
OUT = –V+
to the output V2 is, therefore, the difference between q1 and
q2, so ? q = q1–q2 = C1 (V1–V2).
Φ 1
+2
OSCILLATOR
Φ 2
V1
A
B
C2
R L
V2
Figure 1. Voltage Inversion Principle
C1
S1
CAP+
S3
Figure 3. Switched Capacitor Building Block
V+
S2
Φ 1
+
C1 S4
CAP–
+2
Φ 2
V+
+
C2
V OUT = 2V+
As the switch is toggled between A and B at a frequency f, the
charge transfer per unit time or current is:
I = f ( ? q ) = f ( C 1)( V 1 – V 2)
OSCILLATOR
Figure 2. Voltage Doubling Principle
Figure 1 shows the voltage inverting configuration, while Figure 2
shows the configuration for voltage doubling. An oscillator
generating antiphase signals φ 1 and φ 2 controls switches S1, S2,
and S3, S4. During φ 1, switches S1 and S2 are closed charging
C1 up to the voltage at V+. During φ 2, S1 and S2 open and S3
and S4 close. With the voltage inverter configuration during φ 2,
the positive terminal of C1 is connected to GND via S3 and the
negative terminal of C1 connects to V OUT via S4. The net result
is voltage inversion at V OUT wrt GND. Charge on C1 is trans-
ferred to C2 during φ 2. Capacitor C2 maintains this voltage
during φ 1. The charge transfer efficiency depends on the on-
resistance of the switches, the frequency at which they are being
switched, and also on the equivalent series resistance (ESR) of
Therefore,
I = ( V 1 – V 2)/(1 / fC 1) = ( V 1 – V 2)/( R EQ )
where R EQ = 1/fC1
The switched capacitor may, therefore, be replaced by an equivalent
resistance whose value is dependent on both the capacitor size
and the switching frequency. This explains why lower capacitor
values may be used with higher switching frequencies. It should
be remembered that as the switching frequency is increased the
power consumption will increase due to some charge being lost
at each switching cycle. As a result, at high frequencies, the power
efficiency starts decreasing. Other losses include the resistance
of the internal switches and the equivalent series resistance (ESR)
of the charge storage capacitors.
R EQ
the external capacitors. The reason for this is explained in the
following section. For maximum efficiency, capacitors with low
V1
C2
R L
V2
ESR are, therefore, recommended.
The voltage doubling configuration reverses some of the con-
nections, but the same principle applies.
REV. C
–7 –
R EQ = 1/fC1
Figure 4. Switched Capacitor Equivalent Circuit
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