参数资料
型号: ADM706ARZ-REEL7
厂商: Analog Devices Inc
文件页数: 9/12页
文件大小: 0K
描述: IC SUPERVISOR MPU 4.40V WD 8SOIC
产品培训模块: Voltage Supervisor 101
标准包装: 1,000
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 160 ms
电压 - 阀值: 4.4V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 带卷 (TR)
ADM705/ADM706/ADM707/ADM708
Adding Hysteresis to the Power-Fail Comparator
For increased noise immunity, hysteresis can be added to
the power-fail comparator. Because the comparator circuit is
noninverting, hysteresis can be added simply by connecting a
resistor between the PFO output and the PFI input, as shown in
VALID RESET BELOW 1 V V CC
The ADM705/ADM706/ADM707/ADM708 are guaranteed to
provide a valid reset level with V CC as low as 1 V (see the Typical
Performance Characteristics section). As V CC drops below 1 V,
the internal transistor does not have sufficient drive to hold the
voltage RESET at 0 V. A pull-down resistor can be connected
7V TO 15V
INPUT
POWER
ADP3367
5V
externally, as shown in Figure 17 , to hold the line low if
required.
R1
1.25V
V CC
PFO
ADM705/ADM706/
ADM707/ADM708
R2
+
PFI
ADM705/ADM706/
ADM707/ADM708
TO
MICROPROCESSOR
NMI
RESET
GND
R1
5V
PFO
R3
Figure 17. RESET Valid Below 1 V
0V
0V V L
V IN
V H
V H = 1 . 25 ? 1 + ? ?
? R1 ?
Figure 16. Adding Hysteresis to the Power-Fail Comparator
When PFO is low, Resistor R3 sink s current from the summing
junction at the PFI pin. When PFO is high, Resistor R3 sources
current into the PFI summing junction. This results in differing
trip levels for the comparator. Further noise immunity can be
achieved by connecting a capacitor between PFI and GND. The
equations used to calculate the hysteresis are as follows:
? R2 + R3 ? ?
? ? R2 × R3 ? ?
V L = 1 . 25 + R1 ?
V CC ? 1 . 25 ?
? 1 . 25
? R2
?
?
R3 ?
V MID = 1 . 25 ? ?
R1 + R2 ?
?
?
R2
?
Rev. G | Page 9 of 12
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