参数资料
型号: ADM812
厂商: Analog Devices, Inc.
英文描述: Microprocessor Supervisory Circuits(微处理器监控电路)
中文描述: 微处理器监控电路(微处理器监控电路)
文件页数: 4/6页
文件大小: 212K
代理商: ADM812
ADM811/ADM812
4
Advance Technical Information
Rev 1.0 3/97
Table I. Reset Threshold Options
RESET
Threshold
Model
ADM811LART
ADM811MART
ADM811TART
ADM811SART
ADM811RART
ADM812LART
ADM812MART
ADM812TART
ADM812SART
ADM812RART
4.63 V
4.38 V
3.08 V
2.93 V
2.63 V
4.63 V
4.38 V
3.08 V
2.93 V
2.63 V
PIN CONFIGURATION
V
C C
RESET/RESET
GND
3
1
2
SOT-143 TOPVIEW
4
MR
AD M811 /
AD M8 12
PIN FUNCTION DESCRIPTION
Pin Mnemonic
Function
1
2
GND
RESET(ADM811)
0 V. Ground reference for all signals.
Active Low Logic Output.
RESET
remains low while V
CC
is below the reset threshold or when
MR
is low,
RESET
then remains low for 240ms (typ) after V
CC
rises above the reset threshold
Active High Logic Output. RESET remains high while V
CC
is below the reset threshold or when
MR
is low, RESET then remains high for 240ms (typ) after V
CC
rises above the reset threshold
Manual Reset. This active low debounced input will ignore input pulses of 100ns or less (typical)
and is guaranteed to accept input pulses of greater than 10
μs. Leave floating when not used.
+3V, +3.3V or +5V monitored supply voltage.
2
RESET(ADM812)
3
MR
4
V
CC
CIRCUIT INFORMATION
RESET THRESHOLDS
The reset output provides a
RESET
(for the ADM811) or a
RESET (for the ADM812) output to the microprocessor
whenever the V
CC
input is below the reset threshold. The
actual reset threshold is dependant on whether a L, M, T,
S or R suffix is used. Please refer to Table 1.
RESET OUTPUT
On power-up and after V
CC
rises above the reset threshold,
an internal timer holds the reset output active for 240ms .
This is intended as a power-on reset signal for the
processor. It allows time for both the power supply and the
microprocessor to stabilize after power-up. If a power
supply brownout or interruption occurs, the reset output is
similarly activated and remains active for 240ms after the
supply recovers. This allows time for the power supply and
microprocessor to stabilize.
The ADM811 provides an active low reset output (
RESET
) while the ADM812 provides an active high output
(RESET)
On the ADM811, during power-down, the
RESET
output
remains valid (low) with V
CC
as low as 1 V. This ensures
that the microprocessor is held in a stable shutdown condi-
tion as the supply falls and also ensures that no spurious ac-
tivity can occur via the μP as it powers up.
MANUAL RESET
The ADM811 and ADM812 are equiped with a manual
reset input. This input is designed to operate in a noisey
environment where unwanted glitches could be induced.
These glitches could be produced by the bouncing action of
a switch contact or where a Manual Reset switch may be
located some distance away from the circuit (the cabeling of
which may pick up noise)
The Manual Reset input is guaranteed to ignore logically
valid inputs which are faster than 100ns and accept inputs
longer in duration than 10
μs.
GLITCH IMMUNITY
The ADM811/ADM812 contains internal filtering circuitry
providing glitch immunity for fast transient glitches on the
power supply line. Figure 9 shows the comparator response
time for short transients.
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