参数资料
型号: ADM8696ANZ
厂商: Analog Devices Inc
文件页数: 9/13页
文件大小: 0K
描述: IC SUPERVSR MPU ADJ/RESET 16DIP
标准包装: 25
类型: 备用电池电路
监视电压数目: 1
输出: 推挽式,推挽式
复位: 高有效/低有效
复位超时: 最小为 35 ms
电压 - 阀值: 1.3V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 16-DIP(0.300",7.62mm)
供应商设备封装: 16-PDIP
包装: 管件
ADM8696/ADM8697
APPLICATIONS INFORMATION
Increasing the Drive Current (ADM8696)
If the continuous output current requirements at V OUT exceeds
100 mA or if a lower V CC –V OUT voltage differential is desired,
an external PNP pass transistor may be connected in parallel
This circuit is not entirely foolproof and it is possible a software
fault could erroneously three-state the buffer. This would pre-
vent the ADM869x from detecting that the microprocessor is no
longer operating correctly. In most cases, a better method is to
with the internal transistor. The BATT ON output (ADM8696)
can directly drive the base of the external transistor.
+7V TO +15V
INPUT
POWER
7805
+5V
+5V
INPUT
POWER
0.1 μ F
PNP
TRANSISTOR
0.1 μ F
R1
1.3V
V CC
PFO
R4
TO
μ P NMI
BATTERY
V CC
V BATT
BATT
ON
ADM8696
V OUT
R2
PFI
ADM869x
R3
(
V H = 1.3V 1+ ––– + –––
R 1 R 1
R 2 R 3
)
(
V L = 1.3V 1+ ––– – –––––––––––––
R 1
HYSTERESIS V H – V L = 5V ( ––– )
Figure 14.  Increasing the Drive Current
Using a Rechargeable Battery for Backup (ADM8696)
If a capacitor or a rechargeable battery is used for backup, the
charging resistor should be connected to V OUT since this elimi-
nates the discharge path that would exist during power-down if
R 1 R 1 (5V – 1.3V)
R 2 1.3V (R 3 + R 4 )
ASSUMING R 4 < < R 3 THEN
R 2
)
the resistor is connected to V CC .
Figure 16. Adding Hysteresis to the Power Fail Comparator
extend the watchdog period rather than disabling the watchdog.
I =
V OUT – V BATT
R
This may be done under program control using the circuit
shown in Figure 17b. When the control input is high, the OSC
+5V
INPUT
POWER
0.1 μ F
V CC
R
V OUT
0.1 μ F
SEL pin is low and the watchdog timeout is set by the external
capacitor. A 0.01 μ F capacitor sets a watchdog timeout delay of
100 s. When the control input is low, the OSC SEL pin is
driven high, selecting the internal oscillator. The 100 ms or the
RECHARGABLE
BATTERY
V BATT
ADM8696
1.6 s period is chosen, depending on which diode in Fig-
ure 17b is used. With D1 inserted, the internal timeout is set at
100 ms while with D2 inserted the timeout is set at 1.6 s.
Figure 15. Rechargeable Battery
Adding Hysteresis to the Power Fail Comparator
For increased noise immunity, hysteresis may be added to the
WATCHDOG
STROBE
CONTROL
INPUT
WDI
ADM869x
power fail comparator. Since the comparator circuit is nonin-
verting, hysteresis can be added by connecting a resistor be-
tween the PFO output and the PFI input as shown in Fig-
Figure 17a. Programming the Watchdog Input
ure 16. When PFO is low, resistor R3 sinks current from the
summing junction at the PFI pin. When PFO is high, the series
combination of R3 and R4 source current into the PFI summing
junction. This results in differing trip levels for the comparator.
CONTROL
INPUT*
D1
D2
OSC SEL
ADM869x
Alternate Watchdog Input Drive Circuits
The watchdog feature can be enabled and disabled under pro-
gram control by driving WDI with a three-state buffer (Figure
17a). When three-stated, the WDI input will float, thereby dis-
abling the watchdog timer.
REV. A
–9 –
OSC IN
*LOW = INTERNAL TIMEOUT
HIGH = EXTERNAL TIMEOUT
Figure 17b. Programming the Watchdog Input
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