参数资料
型号: ADM8839ACPZ-REEL
厂商: Analog Devices Inc
文件页数: 8/12页
文件大小: 0K
描述: IC CHARGE PUMP REG TFT 20LFCSP
标准包装: 5,000
应用: 转换器,TFT,LCD
输入电压: 2.7 V ~ 4.2 V
输出数: 3
输出电压: -15V,5V,15V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘,CSP
供应商设备封装: 20-LFCSP-VQ
包装: 带卷 (TR)
配用: ADM8839-EVALZ-ND - BOARD EVALUATION FOR ADM8839

ADM8839
THEORY OF OPERATION
POWER SEQUENCING
For the TFT panel to power up correctly, the gate drive supplies
must be sequenced such that the ?15 V supply is up before the
+15 V supply. The ADM8839 controls this sequence. When the
device is turned on (a logic high on SHDN), the ADM8839
allows the ?15 V output to ramp immediately but holds off the
+15 V output. It continues to do this until the negative output
has reached ?3 V. At this point, the positive output is enabled
and allowed to ramp to +15 V. This sequence is highlighted in
BOOSTING THE CURRENT DRIVE OF THE ±15 V
SUPPLY
The ADM8839 ±15 V output can deliver 150 μA of current in
the typical configuration, as shown in Figure 15. It is also
possible to draw 100 μA from the +15 V output and 200 μA
from the ?15 V output, or vice versa. It is possible to draw a
maximum of only 300 μA combined from the +15 V and the
?15 V outputs at any time (see Figure 16). In this configuration,
+5VOUT (Pin 4) is connected to +5VIN (Pin 5), as shown in
the functional block diagram (see Figure 1).
V CC
V CC
C5, 2.2μF
SHDN
ADM8839
VOLTAGE
DOUBLER
C1+
C1–
C1, 2.2μF
VOUT
t R5V
OSCILLATOR
LDO_IN
+5V
90%
10%
t F5V
LDO_ON/OFF
CONTROL
LOGIC
LDO
VOLTAGE
REGULATOR
+5VOUT
+5VIN
C6, 2.2μF
+5V
t R15V
C7, 2.2μF
90%
DOUBLE
C2+
+15V
10%
t F15V
VOLTAGE
C2–
C2, 0.22μF
TRIPLER
t DELAY
TRIPLE
C3+
+15V
–15V
90%
10%
–3V
t RM15V
TIMING
GENERATOR
C3, 0.22μF
C3–
+15VOUT
C8, 0.22μF
t FM15V
Figure 14. Power Sequence
SHDN
SHUTDOWN
CONTROL
DISCHARGE
VOLTAGE
INVERTER
C4+
C4–
C4, 0.22μF
TRANSIENT RESPONSE
The ADM8839 features extremely fast transient response,
making it very suitable for fast image updates on TFT LCD
panels. This means that even under changing load conditions,
there is still very effective regulation of the 5 V output. Figure 11
and Figure 12 show how the 5 V output responds when a
maximum load is dynamically connected and disconnected.
15.1
15.0
14.9
GND
Figure 15. Typical Configuration
–15VOUT
–15V
C9, 0.22μF
Note that the output settles within 5 μs to less than 1% of the
output level.
14.8
14.7
14.6
14.5
14.4
14.3
14.2
14.1
+15V AT 25°C
–15V AT 25°C
0
50
100
150
200
I LOAD (μA)
Figure 16. +15 V/?15 V Output Voltage vs. Load Current,
Typical Configuration
Rev. C | Page 8 of 12
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