参数资料
型号: ADM8839ACPZ
厂商: Analog Devices Inc
文件页数: 5/12页
文件大小: 0K
描述: IC CHARGE PUMP REG TFT 20LFCSP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1
应用: 转换器,TFT,LCD
输入电压: 2.7 V ~ 4.2 V
输出数: 3
输出电压: -15V,5V,15V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-VFQFN 裸露焊盘,CSP
供应商设备封装: 20-LFCSP-VQ
包装: 托盘
配用: ADM8839-EVALZ-ND - BOARD EVALUATION FOR ADM8839

ADM8839
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V CC 1
VOUT 2
LDO_IN 3
+5VOUT 4
+5VIN 5
PIN 1
INDICATOR
ADM8839
TOP VIEW
15 C4–
14 C2+
13 C2–
12 C3+
11 C3–
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11, 12
13, 14
15, 16
17
18
19, 20
Mnemonic
V CC
VOUT
LDO_IN
+5VOUT
+5VIN
LDO_ON/OFF
SHDN
V CC
GND
+15VOUT
C3?, C3+
C2?, C2+
C4?, C4+
?15VOUT
GND
C1?, C1+
Description
Positive Supply Voltage Input. Connect this pin to the 3 V supply with a 2.2 μF decoupling capacitor. Must be
electrically tied together with Pin 8 by a PCB trace.
Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 μF capacitor to ground is required
on this pin.
Voltage Regulator Input. The user can bypass this circuit by using the LDO_ON/OFF pin.
5 V Output. This is derived by doubling and regulating the 3 V supply. A 2.2 μF capacitor to ground is required
on this pin to stabilize the regulator.
5 V Input. This is the input to the voltage tripler and inverter charge pump circuits.
Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage
doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the
use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into
the voltage tripler and inverter circuits of the ADM8839.
Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing generator and enables
the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V.
Connect this pin to V CC . Must be electrically tied with Pin 1 by a PCB trace.
Connect this pin to GND. Must be electrically tied with Pin 18 by a PCB trace.
15 V Output. This is derived by tripling the 5 V regulated output. A 0.22 μF capacitor is required on this pin.
External Capacitor C3 is connected between these pins. A 0.22 μF capacitor is recommended.
External Capacitor C2 is connected between these pins. A 0.22 μF capacitor is recommended.
External Capacitor C4 is connected between these pins. A 0.22 μF capacitor is recommended.
?15 V Output. This is derived by tripling and inverting the 5 V regulated output. A 0.22 μF capacitor is required
on this pin.
Device Ground. Must be electrically tied with Pin 9 by a PCB trace.
External Capacitor C1 is connected between these pins. A 2.2 μF capacitor is recommended.
Rev. C | Page 5 of 12
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