参数资料
型号: ADN2841ACPZ-32-RL7
厂商: Analog Devices Inc
文件页数: 9/16页
文件大小: 0K
描述: IC LSR DRVR 2.7GBPS 5.5V 32LFCSP
标准包装: 1,500
类型: 激光二极管驱动器(光纤)
数据速率: 2.7Gbps
通道数: 1
电源电压: 4.5 V ~ 5.5 V
电流 - 电源: 50mA
电流 - 调制: 80mA
电流 - 偏置: 100mA
工作温度: -40°C ~ 85°C
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 带卷 (TR)
安装类型: 表面贴装

Data Sheet
THEORY OF OPERATION
Laser diodes have current-in to light-out transfer functions as
shown in Figure 7. Two key characteristics of this transfer function
are the threshold current, I TH , and the slope in the linear region
beyond the threshold current, referred to as slope efficiency, LI.
ADN2841
Note that I ERSET and I PSET change from device to device. However,
the control loops determine the actual values. It is not required
to know the exact values for LI or MPD optical coupling.
LOOP BANDWIDTH SELECTION
ER =
P1
P0
For anyrate operation, the user should hardwire the LBWSET
P1
P AV =
P1 + P0
2
pin high and use 1 μF capacitors to set the actual loop bandwidth.
These capacitors are placed between the PAVCAP and ERCAP
P AV
ΔI
ΔP
LI =
ΔP
ΔI
pins and ground. It is important that these capacitors be low
leakage multilayer ceramics with an insulation resistance greater
than 100 GΩ or a time constant of 1000 sec, whichever is less.
P0
The ADN2841 can be optimized for 2.7 Gbps operation by
keeping the LBWSET pin low. This results in a much shorter
I TH
CURRENT
loop time constant (a 10× reduction). The value of the PAVCAP
I ASET =
I BIASTRIP 50 mA
R ASET =
1 . 23 V 1 . 23 V
R PSET =
R ERSET =
I MPD _ CW ER ? 1
Figure 7. Laser Transfer Function
CONTROL
A monitor photodiode (MPD) is required to control the LD.
The MPD current is fed into the ADN2841 to control the
optical power and extinction ratio, continuously adjusting the
bias current and modulation current in response to the laser’s
changing threshold current and light-to-current (LI) slope
(slope efficiency).
The ADN2841 uses automatic power control (APC) to maintain
a constant power over time and temperature.
The ADN2841 uses closed-loop extinction ratio control to
allow optimum setting of extinction ratio for every device.
Therefore, SONET/SDH interface standards can be met over
device variation, temperature, and time. Closed-loop modu-
lation control eliminates the need to overmodulate the LD or
to include external components for temperature compensation.
This reduces research and development time and second-
sourcing issues caused by characterizing LDs.
Average power and extinction ratio are set using the PSET and
ERSET pins, respectively. Potentiometers are connected between
these pins and ground. The potentiometer R PSET is used to change
the average power. The potentiometer R ERSET is used to adjust
the extinction ratio. Both PSET and ERSET are kept 1.23 V
above GND.
R PSET and R ERSET can be calculated using the following formulas:
1 . 23 V
I AV
where I AV is the average MPD current.
1 . 23 V
× × 0 . 2 × P AV
P CW ER + 1
where
I MPD_CW is the MPD current at the specified P CW .
P CW is the dc optical power specified on the laser data sheet.
and ERCAP capacitors required for 2.7 Gbps operation is 22 nF.
ALARMS
The ADN2841 alarms are designed to allow interface compliance
to ITU-T G.958 (11/94), Section 10.3.1.1.2 (transmit fail) and
Section 10.3.1.1.3 (transmit degrade). The ADN2841 has two
active high alarms, DEGRADE and FAIL. A resistor between
ground and the ASET pin is used to set the current at which
these alarms are raised. The current through the ASET resistor
is a ratio of 100:1 to the FAIL alarm threshold. The DEGRADE
alarm will be raised at 90% of this level.
Example:
I FAIL = 50 mA ∴ I DEGRADE = 45 mA
= = 500 μA
100 100
= = 2 . 46 kΩ
I ASET 500 μA
Note that the smallest value for R ASET is 1.2 kΩ, because this
value corresponds to the I BIAS maximum of 100 mA.
The laser degrade alarm, DEGRADE, gives a warning of
imminent laser failure if the laser diode degrades further
or if environmental conditions—for example, increasing
temperature—continue to stress the LD.
The laser fail alarm, FAIL, is activated when the transmitter can
no longer be guaranteed to be SONET/SDH compliant. This
occurs when one of the following conditions arises:
? The ASET threshold is reached.
? The ALS pin is set high. This shuts off the modulation
and bias currents to the LD, resulting in the MPD current
dropping to 0. This gives closed-loop feedback to the
system in which ALS has been enabled.
The DEGRADE pin goes high only when the bias current
exceeds 90% of the ASET current.
P AV is the required average power.
Rev. B | Page 9 of 16
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