参数资料
| 型号： | ADN4697EBRZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 1/20页 |
| 文件大小： | 0K |
| 描述： | IC RCVR LVDS 2CH 14SOIC |
| 标准包装： | 56 |
| 系列： | * |
3.3 V, 200 Mbps, Half- and Full-Duplex,
High Speed M-LVDS Transceivers
Data Sheet
Rev.
0
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rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
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Tel: 781.329.4700
Fax: 781.461.3113
2011 Analog Devices, Inc. All rights reserved.
FEATURES
Multipoint LVDS transceivers (low voltage differential
signalling driver and receiver pairs)
200 Mbps (100 MHz) switching rates
Supporting bus loads of 30 to 55
Receiver type:
Type 2 (ADN4696E/ADN4697E): threshold offset of 100 mV
for open-circuit and bus-idle fail-safe
Conforms to TIA/EIA-899 standard for M-LVDS
Glitch-free power-up/power-down on M-LVDS bus
Controlled transition times on driver output
Common-mode range: 1 V to +3.4 V, allowing
communication with 2 V of ground noise
Driver outputs high-Z when disabled or powered off
Enhanced ESD protection on bus pins
±15 kV HBM (human body model), air discharge
±8 kV HBM (human body model), contact discharge
±10 kV IEC 61000-4-2, air discharge
±8 kV IEC 61000-4-2, contact discharge
Operating temperature range of 40°C to +85°C
Available packages
8-lead SOIC (ADN4696E)
14-lead SOIC (ADN4697E)
APPLICATIONS
Backplane and cable multipoint data transmission
Multipoint clock distribution
Low power, high speed alternative to shorter RS-485 links
Networking routers and switches
Wireless base station infrastructure
FUNCTIONAL BLOCK DIAGRAMS
ADN4696E
VCC
GND
RO
R
D
RE
DE
A
B
DI
10355-
001
Figure 1.
ADN4697E
VCC
GND
RO
R
D
RE
DE
DI
10355-
002
A
B
Z
Y
Figure 2.
GENERAL DESCRIPTION
The ADN4696E/ADN4697E are multipoint low voltage
differential signalling (M-LVDS) transceivers (driver and
receiver pairs) that can operate at up to 200 Mbps (100 MHz).
The receivers detect the bus state with a differential input of as
little as 50 mV over a common-mode voltage range of 1 V to
+3.4 V. ESD protection of up to ±15 kV is implemented on the
bus pins.
The parts adhere to the TIA/EIA-899 standard for M-LVDS and
are similar to counterpart LVDS devices that comply with the
TIA/EIA-644 standard for LVDS but designed with features for
multipoint applications. These features include a driver output
that supports multipoint bus loads as low as 30 , with controlled
transition times to permit stubs from the backbone transmission
line. Up to 32 nodes can be connected to the bus.
The ADN4696E/ADN4697E are Type 2 receivers exhibiting an
offset threshold, guaranteeing the output state when the bus is idle
(bus-idle fail-safe) or the inputs are open (open-circuit fail-safe).
The ADN4696E/ADN4697E are available as half-duplex
configurations in an 8-lead SOIC package (ADN4696E)
or as full-duplex configurations in a 14-lead SOIC package
(ADN4697E). A part selection table for ADN469xE parts is
shown in Table 1.
Table 1. ADN469xE Selection Table
Part No.
Receiver Type
Data Rate
Package
Half-/Full-Duplex
Evaluation Board
Type 2
200 Mbps
8-lead SOIC
Half
EVAL-ADN469xEHDEBZ
Type 2
200 Mbps
14-lead SOIC
Full
EVAL-ADN469xEFDEBZ
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