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参数资料
| 型号： | ADN8810ACPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 12/16页 |
| 文件大小： | 262K |
| 描述： | IC CURRENT SOURCE(12BIT) 24LFCSP |
| 标准包装： | 1,500 |
| 功能： | 电流源（12 位） |
| 电流 - 输出： | 300mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 24-LFCSP-VQ（4x4） |
| 包装： | 带卷 (TR) |
ADN8810
Rev. A | Page 12 of 16
DAC to be updated. Up to eight ADN8810 devices with unique
addresses can be driven from the same serial data bus.
Table 5 shows how the 16-bit DATA input word is divided into
an address byte and a data byte. The first four bits in the input
word correspond to the address. Note that the first bit loaded
(A3) must always be zero. The remaining bits set the 12-bit data
byte for the DAC output. Three example inputs are
demonstrated.
Table 5. Serial Data Input Examples
Address Byte
Data Byte
SDI Input
A3
A2 A1 A0 D11
D10
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Ex. 1
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
Ex. 2
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Ex. 3
0
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
Example 1: This SDI input sets the device with an address of
111 to its minimum output current, 0 A. Connecting the
ADN8810 pins ADDR2, ADDR1, and ADDR0 to VDD sets this
address.
Example 2: This input sets the device with an address of 000 to
a current equal to half of the full-scale output.
Example 3: The ADN8810 with an address of 100 is set to full-
scale output.
STANDBY AND RESET MODES
Applying a logic low to the
SB
pin deactivates the ADN8810
and puts the output into a high impedance state. The device
continues to draw 1.3 mA of typical supply current in standby.
Once logic high is reasserted on the SB
pin, the output current
returns to its previous value within 6 祍.
Applying logic low to RESET
will set the ADN8810 data register
to all zeros, bringing the output current to 0 A. Once
POWER DISSIPATION
RESET
is
deasserted, the data register can be reloaded. Data cannot be
loaded into the device while it is in Standby or Reset mode.
The power dissipation of the ADN8810 is equal to the output
current multiplied by the voltage drop from PVDD to the
output.
S
OUT
OUT
OUT
DISS
R
I
V
PVDD
I
P
?/DIV>
?/DIV>
=
?/DIV>
(3)
The power dissipated by the ADN8810 will cause a temperature
increase in the device. For this reason, PVDD should be as low
as possible to minimize power dissipation.
While in operation, the ADN8810 die temperature, also known
as junction temperature, must remain below 150癈 to prevent
damage. The junction temperature is approximately
DISS
JA
A
J
P
T
T
?/DIV>
?/DIV>
+
=
(4)
where T
A
is the ambient temperature in 癈, and ?/DIV>
JA
is the
thermal resistance of the package (32癈/W).
Example 4: A 300 mA full-scale output current is required to
drive a laser diode within an 85癈 environment. The laser diode
has a 2 V drop and PVDD is 3.3 V.
Using Equation 3, the power dissipation in the ADN8810 is
found to be 267 mW. At TA = 85癈, this makes the junction
temperature 93.5癈, which is well below the 150癈 limit. Note
that even with PVDD set to 5 V, the junction temperature
would increase to only 110癈.
USING MULTIPLE ADN8810S FOR ADDITIONAL
OUTPUT CURRENT
Connect multiple ADN8810 devices in parallel to increase the
available output current. Each device can deliver up to 300 mA
of current. To program all parallel devices simultaneously, set all
device addresses to the same address byte and drive all
CS
CS
SCLK
SERIAL
TERFACE
(FROM ?/SPAN>C
OR DSP)
SDI
FB
IOUT
R
SN
R
S
1.37&
R
S
1.37&
ADDR2
ADDR1
ADN8810
ADDR0
CS
SCLK
SDI
FB
IOUT
D1
I
LD
600mA
R
SN
R
S
1.37&
RS
1.37&
ADDR2
ADDR1
ADN8810
ADDR0
, SDI,
and CLK from the same serial data interface bus. The circuit in
Figure 18 uses two ADN8810 devices and delivers 600 mA to
the pump laser.
Figure 18. Using Multiple Devices for Additional Output Current
ADDING DITHER TO THE OUTPUT CURRENT
Some tunable laser applications require the laser diode bias
current to be modulated or dithered. This is accomplished by
dithering the V
REF
voltage input to the ADN8810. Figure 19
demonstrates one method.
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