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参数资料
| 型号： | ADP130UJZ-REDYKIT |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/20页 |
| 文件大小： | 0K |
| 描述： | KIT REDI TOOL 1.2/1.8 ADP130 |
| 标准包装： | 1 |
| 系列： | Redykit™ |
| 每 IC 通道数： | 1 - 单 |
| 输出电压： | 1.2V，1.8V |
| 电流 - 输出： | 350mA |
| 输入电压： | 1.2 ~ 3.6 V |
| 稳压器类型： | 正，固定式 |
| 工作温度： | -40°C ~ 125°C |
| 板类型： | 完全填充 |
| 已供物品： | 2 板，样品 |
| 已用 IC / 零件： | ADP130 |
Data Sheet
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP130 is designed for operation with small, space-saving
ceramic capacitors, but it functions with most commonly used
capacitors as long as care is taken regarding the effective series
resistance (ESR) value. The ESR of the output capacitor affects
the stability of the LDO control loop. A minimum of 0.70 μF
capacitance with an ESR of 1 Ω or less is recommended to ensure
stability of the ADP130. Transient response to changes in load
current is also affected by output capacitance. Using a larger value
of output capacitance improves the transient response of the
show the transient responses for output capacitance values of
1 μF and 10 μF, respectively.
ADP130
Input Bypass Capacitor
Connecting a 1 μF capacitor from VIN to GND reduces the circuit
sensitivity to PCB layout, especially when long input traces or
high source impedance are encountered. If >1 μF of output
capacitance is required, the input capacitor should be increased
to match it.
Bias Capacitor
Connecting a 1 μF capacitor from VBIAS to GND reduces the
circuit sensitivity to PCB layout, especially when long input traces
or high source impedance are encountered.
Input, Bias, and Output Capacitor Properties
Any good quality ceramic capacitor can be used with the ADP130,
as long as it meets the minimum capacitance and maximum ESR
requirements. Ceramic capacitors are manufactured with a variety
1
I LOAD
1mA TO 350mA LOAD STEP
2.5A/μs
200mA/DIV
of dielectrics, each with different behavior over temperature and
applied voltage. Capacitors must have a dielectric adequate to
ensure the minimum capacitance over the necessary temperature
range and dc bias conditions. X5R or X7R dielectrics with a voltage
rating of 6.3 V or 10 V are recommended. Y5V and Z5U dielectrics
are not recommended for use with any LDO, due to their poor
2
V OUT = 1.8V
C IN = C OUT = 1μF
V OUT
50mV/DIV
temperature and dc bias characteristics.
of the 0402 1μF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
CH1 200mA
CH2 50mV
M400ns
A CH1
192mA
rating exhibits better stability. The temperature variation of the
T 14%
Figure 34. Output Transient Response, C OUT = 1 μF
I LOAD
X5R dielectric is about ±15% over the ?40 to +85°C temperature
range and is not a function of the package or voltage rating.
1.2
1.0
1
2
1mA TO 350mA LOAD STEP
2.5A/μs
200mA/DIV
V OUT
50mV/DIV
0.8
0.6
0.4
0.2
V OUT = 1.8V
C IN = C OUT = 10μF
0
0
2
4
6
8
10
CH1 200mA
CH2 50mV
M400ns
A CH1
160mA
VOLTAGE (V)
T 13%
Figure 35. Output Transient Response, C OUT = 10 μF
Rev. C | Page 13 of 20
Figure 36. Capacitance vs. Voltage Characteristics
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