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| 型号： | ADP151AUJZ-1.5-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/24页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.5V .2A 5TSOT |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.5V |
| 输入电压： | 2.2 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 200mA（最小值） |
| 电流 - 限制（最小）： | 220mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-5 细型，TSOT-23-5 |
| 供应商设备封装： | TSOT-23-5 |
| 包装： | 标准包装 |
| 其它名称： | ADP151AUJZ-1.5-R7DKR |
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VIN to GND ?0.3 V to +6.5 V
VOUT to GND ?0.3 V to VIN
EN to GND ?0.3 V to +6.5V
Storage Temperature Range ?65°C to +150°C
Operating Junction Temperature Range ?40°C to +125°C
Operating Ambient Temperature Range ?40°C to +125°C
Soldering Conditions JEDEC J-STD-020
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP151 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that T J is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T J ) of
ADP151
on PCB material, layout, and environmental conditions. The
specified values of θ JA are based on a 4-layer, 4 in. × 3 in. circuit
board. See JESD51-7 and JESD51-9 for detailed information
on the board construction. For additional information, see the
AN-617 Application Note, MicroCSP ? Wafer Level Chip Scale
Package , available at www.analog.com .
Ψ JB is the junction-to-board thermal characterization parameter
with units of °C/W. Ψ JB of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information , states
that thermal characterization parameters are not the same as
thermal resistances. Ψ JB measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θ JB . Therefore, Ψ JB thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make Ψ JB more useful in real-world
applications. Maximum junction temperature (T J ) is calculated
from the board temperature (T B ) and power dissipation (P D )
using the formula
T J = T B + ( P D × Ψ JB )
See JESD51-8 and JESD51-12 for more detailed information
about Ψ JB .
THERMAL RESISTANCE
θ JA and Ψ JB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θ JA Ψ JB Unit
the device is dependent on the ambient temperature (T A ), the
power dissipation of the device (P D ), and the junction-to-ambient
thermal resistance of the package (θ JA ).
5-Lead TSOT
4-Ball, 0.4 mm Pitch WLCSP
6-Lead 2 mm × 2 mm LFCSP
170
260
63.6
43
58
28.3
°C/W
°C/W
°C/W
The maximum junction temperature (T J ) is calculated from the
ambient temperature (T A ) and power dissipation (P D ) using the
ESD CAUTION
formula
T J = T A + ( P D × θ JA )
The junction-to-ambient thermal resistance (θ JA ) of the package
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ JA may vary, depending
Rev. E | Page 5 of 24
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