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| 型号： | ADP1706ACPZ-0.95R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 0.95V 1A 8-LFCSP |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 0.95V |
| 输入电压： | 2.5 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A（最小值） |
| 电流 - 限制（最小）： | 1.1A |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VFDFN 裸露焊盘，CSP |
| 供应商设备封装： | 8-LFCSP-VD（3x3） |
| 包装： | 标准包装 |
| 其它名称： | ADP1706ACPZ-0.95R7DKR |
ADP1706/ADP1707/ADP1708
THEORY OF OPERATION
The ADP1706/ADP1707/ADP1708 are low dropout linear
regulators that use an advanced, proprietary architecture to
providing a smooth ramp-up to the nominal output voltage.
The soft start time is calculated by
provide high power supply rejection ratio (PSRR) and excellent
line and load transient response with a small 4.7 μF ceramic
output capacitor. All devices operate from a 2.5 V to 5.5 V input
rail and provide up to 1 A of output current. Supply current in
shutdown mode is typically 100 nA.
T SS = V REF × ( C SS / I SS )
where:
T SS is the soft start period.
V REF is the 0.8 V reference voltage.
C SS is the soft start capacitance from SS to GND.
I SS is the current sourced from SS (1.2 μA).
(1)
IN
OUT
When the ADP1706 is disabled (using EN), the soft start capacitor
is discharged to GND through an internal 100 Ω resistor.
SENSE
CURRENT LIMIT
THERMAL PROTECT
SHUTDOWN
EN
EN
REFERENCE
SOFT
START
ADJ/
TRK/
SS
2
OUT
GND
Figure 27. Internal Block Diagram
Internally, the ADP1706/ADP1707/ADP1708 consist of a
1
V IN = 5V
V OUT = 3.3V
C OUT = 4.7 μ F
C SS = 10nF
I LOAD = 1A
reference, an error amplifier, a feedback voltage divider, and a
PMOS pass transistor. Output current is delivered via the
PMOS pass device, which is controlled by the error amplifier.
The error amplifier compares the reference voltage with the
feedback voltage from the output and amplifies the difference. If
the feedback voltage is lower than the reference voltage, the gate
of the PMOS device is pulled lower, allowing more current
to pass and increasing the output voltage. If the feedback
voltage is higher than the reference voltage, the gate of the
PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
The ADP1706/ADP1707 are available in 16 fixed output voltage
options between 0.75 V and 3.3 V. The ADP1706 allows for
connection of an external soft start capacitor, which controls
the output voltage ramp during startup. The ADP1707 features
a TRK pin that allows the output voltage to follow the voltage at
this pin. The ADP1708 is available in an adjustable version with
an output voltage that can be set to between 0.8 V and 5.0 V by
an external voltage divider. All devices are controlled by an
enable pin (EN).
SOFT START FUNCTION (ADP1706)
For applications that require a controlled startup, the ADP1706
TIME (2ms/DIV)
Figure 28. OUT Ramp-Up with External Soft Start Capacitor
The ADP1707 and ADP1708 have no pins for soft start;
therefore, the function is switched to an internal soft start
capacitor, which sets the soft start ramp-up period to approxi-
mately 48 μs. Note that the ramp-up period is the time it takes
OUT to go from 0% to 90% of the nominal value and is
different from the start-up time in Table 1, which is the time
between the rising edge of EN to OUT being at 90% of the
nominal value. For the worst-case output voltage of 5 V, using
the suggested 4.7 μF output capacitor, the resulting input
inrush current is approximately 490 mA, which is less than
the maximum 1 A load current.
EN
2
provides a programmable soft start function. The programma-
ble soft start is useful for reducing inrush current upon startup
and for providing voltage sequencing. To implement a soft start,
1
OUT
V IN = 5V
V OUT = 1.6V
C OUT = 4.7 μ F
I LOAD = 10mA
connect a small ceramic capacitor from SS to GND. Upon
startup, a 1.2 μA current source charges this capacitor. The
ADP1706 start-up output voltage is limited by the voltage at SS,
Rev. 0 | Page 10 of 20
TIME (20μs/DIV)
Figure 29. OUT Ramp-Up with Internal Soft Start
相关PDF资料 |
PDF描述 |
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| ADP1706ACPZ-0.9-R7 | IC REG LDO 0.9V 1A 8-LFCSP |
| ADP1706ACPZ-1.05R7 | IC REG LDO 1.05V 1A 8-LFCSP |
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相关代理商/技术参数 |
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| ADP1706ACPZ-1.05R7 | 功能描述:IC REG LDO 1.05V 1A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP1706ACPZ-1.0-R7 | 功能描述:IC REG LDO 1V 1A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP1706ACPZ-1.15R7 | 功能描述:IC REG LDO 1.15V 1A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP1706ACPZ-1.1-R7 | 功能描述:IC REG LDO 1.1V 1A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP1706ACPZ-1.2-R7 | 功能描述:IC REG LDO 1.2V 1A 8LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 产品培训模块:MIC5365/66 Ultra-small LDO Regulators 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3V 输入电压:最高 5.5V 电压 - 压降（标准）:0.155V @ 150mA 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:200mA 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:4-UDFN 裸露焊盘，4-TMLF? 供应商设备封装:4-TMLF?（1x1） 包装:Digi-Reel® 其它名称:576-3192-6 |
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