参数资料
型号: ADP172ACBZ-1.5-R7
厂商: Analog Devices Inc
文件页数: 13/20页
文件大小: 0K
描述: IC REG LDO 1.5V .3A 4WLCSP
产品变化通告: 8mm Carrier Tape Changes 28/Feb/2012
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 1.5V
输入电压: 1.6 V ~ 3.6 V
稳压器数量: 1
电流 - 输出: 300mA(最小值)
电流 - 限制(最小): 400mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 4-UFBGA,WLCSP
供应商设备封装: 4-WLCSP
包装: 标准包装
其它名称: ADP172ACBZ-1.5-R7DKR
Data Sheet
In this example, the worst-case temperature coefficient
(TEMPCO) over ?40°C to +85°C is assumed to be 15% for an
X5R dielectric. The tolerance of the capacitor (TOL) is assumed
to be 10%, and C BIAS is 0.94 μF at 1.8 V, as shown in Figure 26.
Substituting these values in Equation 1 yields
C EFF = 0.94 μF × (1 ? 0.15) × (1 ? 0.1) = 0.719 μF
ADP172
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 28 shows typical EN active/inactive thresholds
when the input voltage varies from 1.6 V to 3.6 V.
1.2
1.1
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over temper-
ature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP172, it is imperative
that the effects of dc bias, temperature, and tolerances on the
1.0
0.9
0.8
0.7
EN ACTIVE
EN INACTIVE
behavior of the capacitors be evaluated for each application.
UNDERVOLTAGE LOCKOUT
The ADP172 has an internal undervoltage lockout circuit that
disables all inputs and the output when the input voltage is less
than approximately 1.2 V. This ensures that the ADP172 inputs
and the output behave in a predictable manner during power-up.
ENABLE FEATURE
The ADP172 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. As shown in Figure 27,
when a rising voltage on EN crosses the active threshold, VOUT
turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
3.5
3.0
2.5
0.6
0.5
0.4
V IN (V)
Figure 28. Typical EN Pin Thresholds vs. Input Voltage
The ADP172 uses an internal soft start to limit the inrush
current when the output is enabled. The start-up time for the
1.8 V option is approximately 120 μs from the time the EN
active threshold is crossed to when the output reaches 90%
of its final value. As shown in Figure 29, the start-up time is
dependent on the output voltage setting.
EN
V OUT = 3.0V
2.0
V OUT = 1.8V
1.5
1.0
0.5
0
1
2
V OUT = 0.8V
0
0.2
0.4
0.6
0.8
V EN
1.0
1.2
1.4
1.6
CH1 1.00V
CH2 1.00V
B
W
M20.0μs A CH1
T 79.8000μs
2.72V
Figure 27. ADP172 Typical EN Pin Operation
As shown in Figure 27, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
Rev. D | Page 13 of 20
Figure 29. Typical Start-Up Time
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