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参数资料
| 型号： | ADP1754ACPZ-1.0-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1V 1.2A 16LFCSP |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1V |
| 输入电压： | 1.6 V ~ 3.6 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1.2A（最小值） |
| 电流 - 限制（最小）： | 1.5A |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN 裸露焊盘，CSP |
| 供应商设备封装： | 16-LFCSP-VQ EP（4x4） |
| 包装： | 标准包装 |
| 其它名称： | ADP1754ACPZ-1.0-R7DKR |
Data Sheet
ADP1754/ADP1755
SPECIFICATIONS
V IN = (V OUT + 0.4 V) or 1.6 V (whichever is greater), I OUT = 10 mA, C IN = C OUT = 4.7 μF, T A = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT 1
Symbol
V IN
I GND
Test Conditions/Comments
T J = ?40°C to +125°C
I OUT = 500 μA
Min
1.6
Typ
90
Max
3.6
Unit
V
μA
I OUT = 100 mA
I OUT = 100 mA, T J = ?40°C to +125°C
I OUT = 1.2 A
I OUT = 1.2 A, T J = ?40°C to +125°C
400
1.1
800
1.4
μA
μA
mA
mA
SHUTDOWN CURRENT
I GND-SD
EN = GND, V IN = 1.6 V
2
6
μA
OUTPUT VOLTAGE ACCURACY
EN = GND, V IN = 1.6 V, T J = ?40°C to +85°C
EN = GND, V IN = 3.6 V, T J = ?40°C to +85°C
30
100
μA
μA
Fixed Output Voltage Accuracy
(ADP1754)
V OUT
I OUT = 10 mA
I OUT = 10 mA to 1.2 A
10 mA < I OUT < 1.2 A, T J = ?40°C to +125°C
?1
?1.5
?2
+1
+1.5
+2
%
%
%
Adjustable Output Voltage Accuracy
(ADP1755) 2
V ADJ
I OUT = 10 mA
I OUT = 10 mA to 1.2 A
0.495
0.495
0.5
0.505
0.505
V
V
10 mA < I OUT < 1.2 A, T J = ?40°C to +125°C
0.490
0.510
V
LINE REGULATION
LOAD REGULATION 3
DROPOUT VOLTAGE 4
?V OUT /?V IN
?V OUT /?I OUT
V DROPOUT
V IN = (V OUT + 0.4 V) to 3.6 V, T J = ?40°C to +125°C
I OUT = 10 mA to 1.2 A, T J = ?40°C to +125°C
I OUT = 100 mA, V OUT ≥ 1.8 V
?0.3
10
+0.3
0.6
%/V
%/A
mV
I OUT = 100 mA, V OUT ≥ 1.8 V, T J = ?40°C to +125°C
I OUT = 1.2 A, V OUT ≥ 1.8 V
I OUT = 1.2 A, V OUT ≥ 1.8 V, T J = ?40°C to +125°C
105
16
200
mV
mV
mV
START-UP TIME 5
t START-UP
C SS = 0 nF, I OUT = 10 mA
C SS = 10 nF, I OUT = 10 mA
200
5.2
μs
ms
CURRENT-LIMIT THRESHOLD 6
I LIMIT
1.5
2
5
A
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
TS SD
TS SD-HYS
T J rising
150
15
° C
° C
PG OUTPUT LOGIC LEVEL
PG Output Logic High
PG Output Logic Low
PG Output Delay from EN Transition
PG HIGH
PG LOW
1.6 V ≤ V IN ≤ 3.6 V, I OH < 1 μA
1.6 V ≤ V IN ≤ 3.6 V, I OL < 2 mA
1.6 V ≤ V IN ≤ 3.6 V, C SS = 10 nF
1.0
5.5
0.4
V
V
ms
Low to High
PG OUTPUT THRESHOLD
Output Voltage Falling
Output Voltage Rising
PG FALL
PG RISE
1.6 V ≤ V IN ≤ 3.6 V
1.6 V ≤ V IN ≤ 3.6 V
?10
?6.5
%
%
EN INPUT
EN Input Logic High
EN Input Logic Low
V IH
V IL
1.6 V ≤ V IN ≤ 3.6 V
1.6 V ≤ V IN ≤ 3.6 V
1.2
0.4
V
V
EN Input Leakage Current
V I-LEAKAGE
EN = VIN or GND
0.1
1
μA
UNDERVOLTAGE LOCKOUT
UVLO
Input Voltage Rising
Input Voltage Falling
Hysteresis
UVLO RISE
UVLO FALL
UVLO HYS
T J = ?40°C to +125°C
T J = ?40°C to +125°C
T J = 25°C
1.25
100
1.58
V
V
mV
SOFT START CURRENT
ADJ INPUT BIAS CURRENT (ADP1755)
SENSE INPUT BIAS CURRENT
I SS
ADJ I-BIAS
SNS I-BIAS
1.6 V ≤ V IN ≤ 3.6 V
1.6 V ≤ V IN ≤ 3.6 V, T J = ?40°C to +125°C
1.6 V ≤ V IN ≤ 3.6 V
0.6
0.9
10
10
1.2
150
μA
nA
μA
Rev. F | Page 3 of 20
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