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参数资料
| 型号： | ADP1875-0.3-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL 300KHZ ADP1875 |
| 标准包装： | 1 |
| 系列： | * |
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Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADP1874/ADP1875
VIN 1
COMP 2
16 BST
15 SW
EN 3
FB 4
GND 5
RES 6
VREG 7
ADP1874/
ADP1875
TOP VIEW
(Not to Scale)
14 DRVH
13 PGND
12 DRVL
11 PGOOD
10 SS
VREG_IN 8
9
TRACK
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
VIN
COMP
EN
FB
GND
RES
VREG
VREG_IN
TRACK
SS
PGOOD
DRVL
PGND
DRVH
SW
BST
Description
High-Side Input Voltage. Connect VIN to the drain of the upper side MOSFET.
Output of the Error Amplifier. Connect the compensation network between this pin and AGND to achieve stability (see the
Compensation Network section).
Connect to VREG to Enable IC. When pulled down to AGND externally, disables the IC.
Noninverting Input of the Internal Error Amplifier. This is the node where the feedback resistor is connected.
Analog Ground Reference Pin of the IC. All sensitive analog components should be connected to this ground plane
(see the Layout Considerations section).
Current Sense Gain Resistor (External). Connect a resistor between the RES pin and GND (Pin 5).
Internal Regulator Supply Bias Voltage for the ADP1874 / ADP1875 Controller (Includes the Output Gate Drivers). A
bypass capacitor of 1 μF directly from this pin to PGND and a 0.1 μF across VREG and GND are recommended.
Input to the Internal LDO. Tie this pin directly to Pin 7 (VREG).
Tracking Input. If the tracking function is not used, it is recommended to connect TRACK to VREG through a resistor
higher than 1 MΩ or simply connect TRACK between 0.7 V and 2 V to reduce the bias current going into the pin.
Soft Start Input. Connect an external capacitor to GND to program the soft start period. Capacitance value of 10 nF for
every 1 ms of soft start delay.
Open-Drain Power Good Output. Sinks current when FB is out of regulation or during thermal shutdown. Connect a
3 kΩ resistor between PGOOD and VREG. Leave unconnected if not used.
Drive Output for the External Lower Side, N-Channel MOSFET. This pin also serves as the current-sense gain setting pin (see
Power GND. Ground for the lower side gate driver and lower side, N-channel MOSFET.
Drive Output for the External Upper Side, N-Channel MOSFET.
Switch Node Connection.
Bootstrap for the Upper Side MOSFET Gate Drive Circuitry. An internal boot rectifier (diode) is connected between VREG and
BST. A capacitor from BST to SW is required. An external Schottky diode can also be connected between VREG and BST for
increased gate drive capability.
Rev. A | Page 7 of 44
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1875-1.0-EVALZ | 功能描述:BOARD EVAL 1MHZ ADP1875 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1875ARQZ-0.3-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 特色产品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 标准包装:1 系列:PowerWise® PWM 型:电压模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.5 V ~ 18 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-5°C ~ 125°C 封装/外壳:32-WFQFN 裸露焊盘 包装:Digi-Reel® 产品目录页面:1303 (CN2011-ZH PDF) 其它名称:LM3754SQDKR |
| ADP1875ARQZ-0.6-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1875ARQZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 16-QSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1876 | 制造商:AD 制造商全称:Analog Devices 功能描述:600 kHz Dual Output Synchronous Buck |
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