参数资料
型号: ADP2102-EVALZ
厂商: Analog Devices Inc
文件页数: 21/24页
文件大小: 0K
描述: BOARD EVAL FOR ADJ VOLT ADP2102
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 1,非隔离
稳压器拓扑结构: 降压
板类型: 完全填充
已供物品:
已用 IC / 零件: ADP2102
产品目录页面: 791 (CN2011-ZH PDF)
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ADP2102
C IN =
=
Output Capacitor
For transient applications, assume a droop of 0.1 V. Typically,
it takes two to three cycles for the output to settle from a load
transient because the capacitor alone supplies the load current
until the loop responds.
Under these conditions, a minimum required output
Input Capacitor
Assume an input ripple of 27 mV based on 1% of V IN_MIN.
For ceramic capacitors, the typical ESR is from 5 mΩ to 15 mΩ.
1
( Δ V IN / I OUT ? ESR ) × 4 × f SW
Δ I LOAD
V DROOP × f SW
capacitance is calculated as follows:
C OUT_MIN = 3 × =
3 × 0 . 3
0 . 1 × 3 × 10 6
= 3 μF
1
( 0 . 027 / 0 . 6 ? 0 . 005 ) × 4 × 3 × 10 6
I rms = I OUT /2 = 0.3 A rms
= 2.2 μF
Choose a 4.7 μF capacitor for this application.
For an instantaneous step decrease in load current, the output
capacitor required to limit the output voltage overshoot (V OS )
during a full load to no load transient must be determined. This
transient requires the excess energy stored in the output inductor
to be absorbed by the output capacitor with a limited overshoot
in the output voltage.
Assuming an overshoot of 50 mV for a full load transient,
P CIN = I rms 2 × ESR = (0.3) 2 × 0.005 = 450 μW
Losses
P SW_COND = ( R DS (ON)_P × D + R DS (ON)_N × (1 ? D )) × I OUT 2 =
(0.310 × 0.5 + 0.145 × 0.5) × (0.6) 2 = 82 mW
P TRAN = ( V IN /2) × I OUT × ( t R + t F ) × f SW =
(3.6/2) × 0.6 × (5 ns + 5 ns) × 3 × 10 6 = 32.4 mW
P SW = ( C GATE_P + C GATE_N ) × V IN 2 × f SW = (200 pF) ×
L × I OUT 2 2 . 2 μ H × ( 0 . 6 ) 2
( V OUT + V OS ) 2 ? V OUT 2
( 1 . 85 ) 2 ? ( 1 . 8 ) 2
C OUT = =
Choose a 4.7 μF capacitor for this application.
= 4.33 μF
(3.6) 2 × 3 × 10 6 = 7.8 mW
P L = DCR × I OUT 2 = 0.08 × (0.6) 2 = 28.8 mW
P LOSS = P SW_COND + P TRAN + P SW + P L =
82 mW + 32.4 mW + 7.8 mW + 28.8 mW = 151 mW
I rms =
1
2 3
1
2 3
×
×
V OUT × ( V IN _ MAX ? V OUT )
L × f SW × V IN _ MAX
1 . 8 × ( 4 . 2 ? 1 . 8 )
2 . 2 × 10 ? 6 × 3 × 10 6 × 4 . 2
=
= 45 mA rms
T JMAX = T A + θ JA
P LOSS = 85°C + 54°C/W × 151 mW = 93.15°C
P LOSS is well below the junction temperature maximum of 125°C.
P COUT = I rms 2 × ESR = (0.045) 2 × 0.005 = 10.12 μW
Rev. B | Page 21 of 24
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