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| 型号： | ADP2108ACBZ-1.5-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 1.5V .6A 5WLCSP |
| 产品变化通告： | 8mm Carrier Tape Changes 28/Feb/2012 |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 1.5V |
| 输入电压： | 2.3 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 3MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 5-WFBGA，WLCSP |
| 包装： | 标准包装 |
| 供应商设备封装： | 5-WLCSP |
| 其它名称： | ADP2108ACBZ-1.5-R7DKR |
Data Sheet
THEORY OF OPERATION
PWM
ADP2108
GM ERROR
COMP
PSM
AMP
VIN
SOFT START
I LIMIT
FB
PSM
COMP
PWM/
LOW
CONTROL CURRENT
SW
OSCILLATOR
UNDERVOLTAGE
DRIVER
AND
ANTISHOOT-
THROUGH
LOCKOUT
GND
ADP2108
THERMAL
SHUTDOWN
EN
Figure 29. Functional Block Diagram
The ADP2108 is a step-down dc-to-dc converter that uses a
fixed frequency and high speed current mode architecture. The
high switching frequency allows for a small step-down, dc-to-dc
converter solution.
The ADP2108 operates with an input voltage of 2.3 V to 5.5 V
and regulates an output voltage down to 1.0 V.
CONTROL SCHEME
The ADP2108 operates with a fixed frequency, current mode
PWM control architecture at medium to high loads for high
efficiency, but shifts to a power save mode control scheme at
light loads to lower the regulation power losses. When operating
in fixed frequency PWM mode, the duty cycle of the integrated
switches is adjusted and regulates the output voltage. When
operating in power save mode at light loads, the output voltage
is controlled in a hysteretic manner, with higher V OUT ripple.
During part of this time, the converter is able to stop switching
and enters an idle mode, which improves conversion efficiency.
PWM MODE
In PWM mode, the ADP2108 operates at a fixed frequency of
3 MHz, set by an internal oscillator. At the start of each oscillator
cycle, the PFET switch is turned on, sending a positive voltage
across the inductor. Current in the inductor increases until the
current sense signal crosses the peak inductor current threshold
that turns off the PFET switch and turns on the NFET synchronous
rectifier. This sends a negative voltage across the inductor, causing
the inductor current to decrease. The synchronous rectifier stays
POWER SAVE MODE
The ADP2108 smoothly transitions to the power save mode of
operation when the load current decreases below the power
save mode current threshold. When the ADP2108 enters power
save mode, an offset is induced in the PWM regulation level,
which makes the output voltage rise. When the output voltage
reaches a level approximately 1.5% above the PWM regulation
level, PWM operation is turned off. At this point, both power
switches are off, and the ADP2108 enters an idle mode. C OUT
discharges until V OUT falls to the PWM regulation voltage, at
which point the device drives the inductor to make V OUT rise
again to the upper threshold. This process is repeated while the
load current is below the power save mode current threshold.
Power Save Mode Current Threshold
The power save mode current threshold is set to 80 mA. The
ADP2108 employs a scheme that enables this current to remain
accurately controlled, independent of V IN and V OUT levels. This
scheme also ensures that there is very little hysteresis between
the power save mode current threshold for entry to and exit from
the power save mode. The power save mode current threshold
is optimized for excellent efficiency over all load currents.
ENABLE/SHUTDOWN
The ADP2108 starts operation with soft start when the EN pin
is toggled from logic low to logic high. Pulling the EN pin low
forces the device into shutdown mode, reducing the shutdown
current below 1 μA.
on for the rest of the cycle. The ADP2108 regulates the output
voltage by adjusting the peak inductor current threshold.
Rev. G | Page 11 of 20
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