参数资料
型号: ADP2138ACBZ-2.5-R7
厂商: Analog Devices Inc
文件页数: 14/20页
文件大小: 0K
描述: IC REG BUCK SYNC 2.5V .8A 6WLCSP
产品变化通告: 8mm Carrier Tape Changes 28/Feb/2012
标准包装: 3,000
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 2.5V
输入电压: 2.3 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 3MHz
电流 - 输出: 800mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-UFBGA,WLCSP
包装: 带卷 (TR)
供应商设备封装: 6-WLCSP(1.03x1.50)
ADP2138/ADP2139
6
5
4
3
2
1
Data Sheet
THERMAL CONSIDERATIONS
Because of the high efficiency of the ADP2138/ADP2139, only a
small amount of power is dissipated inside the ADP2138/ADP2139
package, which reduces thermal constraints.
However, in applications with maximum loads at high ambient
temperature, low supply voltage, and high duty cycle, the heat
dissipated in the package is great enough that it may cause the
junction temperature of the die to exceed the maximum junc-
tion temperature of 125°C. If the junction temperature exceeds
150°C, the converter enters thermal shutdown. It recovers when
the junction temperature falls below 130°C.
0
0
1
2
3
4
5
6
The junction temperature of the die is the sum of the ambient
V IN I RIPPLE
( 2 π × f SW ) × 2 × L × C OUT
ESR COUT ≤
DC BIAS VOLTAGE (V)
Figure 35. Typical Capacitor Performance
The peak-to-peak output voltage ripple for the selected output
capacitor and inductor values is calculated using the following
equation:
V RIPPLE = =
8 × f SW × C OUT
Capacitors with lower equivalent series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in
the following equation:
V RIPPLE
I RIPPLE
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is 3 μF.
temperature of the environment and the temperature rise of the
package due to power dissipation, as shown in the following
equation:
T J = T A + T R
where:
T J is the junction temperature.
T A is the ambient temperature.
T R is the rise in temperature of the package due to power
dissipation.
The rise in temperature of the package is directly proportional
to the power dissipation in the package. The proportionality
constant for this relationship is the thermal resistance from the
junction of the die to the ambient temperature, as shown in the
following equation:
T R = θ JA × P D
Table 7. Suggested 4.7 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating (V)
where:
T R is the rise in temperature of the package.
θ JA is the thermal resistance from the junction of the die to the
Murata
Taiyo Yuden
Coilcraft TDK
X5R
X5R
X5R
GRM188R60J475
JMK107BJ475
C1608X5R0J475
0603
0603
0603
6.3
6.3
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ambient temperature of the package.
P D is the power dissipation in the package.
PCB LAYOUT GUIDELINES
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response. Maximum input
capacitor current is calculated using the following equation:
Poor layout can affect ADP2138/ADP2139 performance, causing
EMI and electromagnetic compatibility problems, ground
bounce, and voltage losses. Poor layout can also affect regulation
and stability. To implement a good layout, use the following rules:
I CIN ≥ I LOAD ( MAX )
V OUT ( V IN ? V OUT )
V IN
?
Place the inductor, input capacitor, and output capacitor
close to the IC using short tracks. These components carry
high switching frequencies, and large tracks act as antennas.
To minimize supply noise, place the input capacitor as close to
the VIN pin of the ADP2138/ADP2139 as possible. As with the
output capacitor, a low ESR capacitor is recommended. The list
of recommended capacitors is shown in Table 8.
?
?
Route the output voltage path away from the inductor and
SW node to minimize noise and magnetic interference.
Maximize the size of ground metal on the component side
to help with thermal dissipation.
Table 8. Suggested 4.7 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating (V)
?
Use a ground plane with several vias connecting to the com-
ponent side ground to further reduce noise interference on
sensitive circuit nodes.
Murata
Taiyo Yuden
Coilcraft TDK
X5R
X5R
X5R
GRM188R60J475
JMK107BJ475
C1608X5R0J475
0603
0603
0603
6.3
6.3
6.3
Rev. C | Page 14 of 20
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