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参数资料
| 型号： | ADP2291RM-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL ADP2291 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，电池充电器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADP2291 |
| 主要属性： | 锂离子电池，750mA 时为 4.2V 输出，4.5 ~ 5.5 Vin |
| 次要属性： | LED 状态指示器，深度放电，预充电，热关闭模式 |
| 已供物品： | 板 |
ADP2291
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Use the following general guidelines when designing printed
circuit boards:
Note that the via diameter is small to prevent the solder
from flowing through the via and leaving voids in the
thermal pad solder joint.
Note also that the thermal pad is attached to the die sub-
?
Keep the output capacitor as close to the BAT and GND
pins as possible.
strate; therefore, the thermal planes to which the vias
attach the package must be electrically isolated or
connected to GND.
?
Keep the input capacitor as close to the IN and GND pins
as possible.
?
The solder mask opening should be about 120 microns
(4.7 mils) larger than the pad size, resulting in a minimum
?
PC board traces with larger cross-sectional areas remove
more heat from the pass transistor. For optimum heat
of 60 microns (2.4 mils) clearance between the pad and the
solder mask.
?
transfer, specify thick copper and use wide traces.
Use additional copper layers or planes to reduce thermal
?
The paste mask opening is typically designed to match the
pad size used on the peripheral pads of the LFCSP package.
resistance. When connecting to other layers, use multiple
vias if possible.
LFSCP LAYOUT CONSIDERATIONS
The LFCSP package has an exposed die paddle on the bottom
that efficiently conducts heat to the PCB. To achieve the
This should provide a reliable solder joint as long as the
stencil thickness is about 0.125 mm. The paste mask for the
thermal pad needs to be designed for the maximum coverage
to effectively remove the heat from the package. However,
due to the presence of thermal vias and the size of the ther-
mal pad, eliminating voids may not be possible.
optimum performance from the LFCSP package, give special
consideration to the layout of the PCB. Use the following layout
guidelines for the LFCSP package:
?
The recommended paste mask stencil thickness is
0.125 mm. Use a laser cut stainless steel stencil with
?
?
The pad pattern is shown in Figure 27. Follow the pad
dimension closely for reliable solder joints, while
maintaining reasonable clearances to prevent solder
bridging.
The thermal pad of the LFCSP package provides a low
thermal impedance path (approximately 20°C/W) to the
?
?
trapezoidal walls.
Use a no-clean, Type 3 solder paste for mounting the
LFCSP package. A nitrogen purge during the reflow
process is recommended.
The package manufacturer recommends that the reflow
temperature not exceed 220°C and the time above liquidus
PCB; therefore, a properly designed PCB effectively con-
ducts the heat away from the package. This is achieved by
adding thermal vias to the PCB that provide a thermal path
to the inner or bottom layers.
2 × VIAS, 0.250 ?
35 μ m PLATING
be less than 75 seconds. Make sure the preheat ramp is
3°C/second or lower. The actual temperature profile
depends on the board’s density and should be determined
by the assembly house.
Table 7. Variables Description
Variable
0.30
0.73
Name
V X
V RS
Description
The voltage on Pin X.
The regulation setpoint for the voltage across the
0.90
1.80
2.36
V BAT, EOC
sense resistor (RS).
The battery voltage at the point charging current is
0.50
I MAX
1/10 the current setpoint.
The charge current corresponding to VRS,
including the effects of ADJ pin voltage.
1.40
1.90
3.36
C rate
The charge current (mA) expressed as a multiple of
the nominal battery capacity (mAh). A 900 mAh
capacity battery, charged at a 1/10 C rate, is
equivalent to a 90 mA charge current.
Figure 27. 3 mm × 3 mm LFCSP Pad Pattern
(Dimensions in millimeters)
Rev. A | Page 16 of 20
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