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参数资料
| 型号： | ADP3050ARZ-5-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 5V 1A 8SOIC |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 3.6 V ~ 30 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 200kHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-SO |
| 其它名称： | ADP3050ARZ-5-REEL7DKR |
V COMP , RIPPLE = ( g m × R C ) × ( I RIPPLE × ESR ) ×
V FB
V COMP , RIPPLE = ( 1250 × 10 ? 6 × 4 × 10 3 ) × ( 0 . 310 × 0 . 1 ) ×
DataSheet
shows the approximate unity-gain frequency of the loop. Again,
always check the design over its full operating range of input
voltage, output current, and temperature to ensure that the loop
is compensated correctly.
In addition to setting the zero location, R C also sets the high
frequency gain of the error amplifier. If this gain is too large,
output ripple voltage appears at the COMP pin (the output of
the error amplifier) with enough amplitude to interfere with
normal regulator operation. If this occurs, subharmonic switching
results (the pulse width of the switch waveform changes, even
though the output voltage stays regulated). The voltage ripple at the
COMP pin should be kept below 100 mV to prevent subharmonic
switching from occurring. The amount of ripple can be estimated
by the following formula, where g m is the error amplifier
transconductance (g m = 1250 μMho):
(10)
V OUT
For example, a 12 V to 5 V, 800 mA regulator with an inductor of
L = 47 μH has I RIPPLE = 310 mA (see example from the Continuous
Mode section) if a 100 μF tantalum output capacitor with a
maximum ESR of 100 mΩ and compensation values of R C = 4 kΩ
and C C = 1 nF are used. The ripple voltage at the COMP pin is
1 . 20
5 . 0 (11)
= 37 . 2 mV
If this ripple voltage is more than 100 mV, R C needs to be
decreased to prevent subharmonic switching. Typical values for
R C are in the range of 2 kΩ to 10 kΩ.
For output voltages greater than 5 V, it may be necessary to add
This improves stability and transient response. For tantalum
output capacitors, the typical value for C F is 100 pF. For ceramic
output capacitors, the typical value for C F is 400 pF.
CURRENT LIMIT/FREQUENCY FOLDBACK
The ADP3050 uses a cycle-by-cycle current limit to protect the
device under fault and high stress conditions. When the current
limit is exceeded, the power switch turns off until the beginning
of the next oscillator cycle. If the voltage on the feedback pin
drops below 80% of its nominal value, the oscillator frequency
starts to decrease (see Figure 17 in the Typical Performance
Characteristics section). The frequency gradually reduces to a
minimum value of approximately 80 kHz (this minimum
occurs when the feedback voltage falls to 30% of its nominal
value). This reduces the power dissipation in the IC, the
external diode, and the inductor during short-circuit
conditions. This frequency foldback method provides complete
device fault protection without interfering with the normal
device operation.
ADP3050
BIAS PIN CONNECTION
To help improve efficiency, most of the internal operating
current can be drawn from the lower voltage regulated output
voltage instead of the input supply. For example, if the input
voltage is 24 V and the output voltage is 5 V, a quiescent current
of 4 mA wastes 96 mW if drawn from the input supply, but only
20 mW is drawn from the regulated 5 V output. This power
savings is most evident at high input voltages and low load
currents. The output voltage must be 3 V or higher to take
advantage of this feature.
BOOSTED DRIVE STAGE
An external capacitor and diode are used to provide the boosted
voltage needed for the special drive stage. If the output voltage is
above 4 V, connect the anode of the boost diode to the regulated
output; for output voltages less than or equal to voltages of ≤3 V,
connect it to the input supply. For some low voltage systems,
such as 5 V to 3.3 V converters, the anode of the boost diode
can be connected to either the input or output voltage. During
switch off time, the boost capacitor is charged up to the voltage
at the anode of the boost diode. When the switch turns on, this
voltage is added to the switch voltage (the boost diode is reverse-
biased), providing a voltage higher than the input supply. The
peak voltage appearing on the BOOST pin is the sum of the
input voltage and the boost voltage (either V IN + V OUT or 2 × V IN ).
Ensure that this peak voltage does not exceed the BOOST pin
maximum rating of 45 V.
For most applications, a 1N4148 or 1N914 type diode can be
used with a 220 nF capacitor. A 470 nF capacitor may be needed
for output voltages between 3 V and 4 V. The boost capacitor
should have an ESR of less than 2 Ω to ensure that it is adequately
charged up during switch off time. Almost any type of film or
ceramic capacitor can be used.
START-UP/MINIMUM INPUT VOLTAGE
For most designs, the regulated output voltage provides the
boosted voltage for the drive stage. During startup, the output
voltage is 0, so there is no boosted supply for the drive stage.
To deal with this problem, the ADP3050 contains a backup drive
stage to get everything started. As the output voltage increases,
so does the boost voltage. When the boost voltage reaches approx-
imately 2.5 V, the switch drives transition smoothly from the
backup driver to the boosted driver. If the boost voltage decreases
below approximately 2.5 V, resulting in a short-circuit or
overload condition, the backup stage takes over to provide switch
drive. The minimum input voltage needed for the ADP3050 to
function correctly is about 3.6 V (this ensures proper operation of
the internal circuitry), but a small amount of headroom is needed
for all step-down regulators. The following formula gives the
approximate minimum input voltage needed for a given system,
where V SAT is the switch saturation voltage (see Figure 15 for the
appropriate value of V SAT ). Figure 13 also shows the typical
minimum input voltage needed for 3.3 V and 5 V systems.
Rev. C | Page 15 of 20
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP3050ARZ-R7 | 功能描述:IC REG BUCK ADJ 1A 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| ADP3050ARZ-RL | 功能描述:IC REG BUCK ADJ 1A 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:1.24 V ~ 30 V 输入电压:1.5 V ~ 12 V PWM 型:电流模式，混合 频率 - 开关:600kHz 电流 - 输出:500mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:8-SOIC |
| ADP3050-BL1-EVZ | 功能描述:BOARD EVALUATION FOR ADP3050 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP3050-EVAL | 功能描述:BOARD EVAL FOR ADP3050 RoHS:否 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP3050-EVALZ | 制造商:AD 制造商全称:Analog Devices 功能描述:200 kHz, 1 A High Voltage Step-Down Switching Regulator |
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