- 您现在的位置：买卖IC网 > PDF目录13188 > ADP3300ARTZ-3.3RL7 (Analog Devices Inc)IC REG LDO 3.3V 50MA SOT23-6 PDF资料下载
参数资料
| 型号： | ADP3300ARTZ-3.3RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/9页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V 50MA SOT23-6 |
| 标准包装： | 1 |
| 系列： | anyCAP® |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3.3V |
| 输入电压： | 最高 12V |
| 电压 - 压降（标准）： | 0.08V @ 50mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 50mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 |
| 供应商设备封装： | SOT-23-6 |
| 包装： | 标准包装 |
| 产品目录页面： | 794 (CN2011-ZH PDF) |
| 其它名称： | ADP3300ARTZ3.3RDKR |
ADP3300
THEORY OF OPERATION
The new anyCAP LDO ADP3300 uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2 which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and
a second resistor divider (R3 and R4) to the input of an amplifier.
noise rejection and very high regulator gain, which leads to excel-
lent line and load regulation. An impressive ± 1.4% accuracy is
guaranteed over line, load and temperature.
Additional features of the circuit include current limit, thermal
shutdown and noise reduction. Compared to the standard solu-
tions that give warning after the output has lost regulation,
the ADP3300 provides improved system performance by enabling
the ERR pin to give warning before the device loses regulation.
INPUT
Q1
COMPENSATION
CAPACITOR
OUTPUT
R1
ATTENUATION
(V BANDGAP /V OUT )
As the chip’s temperature rises above 165 ° C, the circuit activates a
soft thermal shutdown, indicated by a signal low on the ERR
pin, to reduce the current to a safe level.
R3
NONINVERTING
WIDEBAND
DRIVER
g m
PTAT
V OS
D1
PTAT
CURRENT
(a)
R LOAD
To reduce the noise gain of the loop, the node of the main
divider network (a) is made available at the noise reduction (NR)
pin, which can be bypassed with a small capacitor (10 nF–100 nF).
R4
R2
ADP3300
C LOAD
APPLICATION INFORMATION
Capacitor Selection: anyCAP
Output Capacitors: as with any micropower device, output
transient response is a function of the output capacitance. The
Figure 2. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input “offset voltage”
that is repeatable and very well controlled. The temperature-
proportional offset voltage is combined with the complimentary
diode voltage to form a “virtual bandgap” voltage, implicit in
the network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexibility
on the trade-off of noise sources that leads to a low noise design.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1 and a second divider consisting
of R3 and R4, the values are chosen to produce a temperature
stable output. This unique arrangement specifically corrects for
the loading of the divider so that the error resulting from base
current loading in conventional circuits is avoided.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type and ESR of the
load capacitance.
ADP3300 is stable with a wide range of capacitor values, types
and ESR (anyCAP). A capacitor as low as 0.47 μ F is all that is
needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3300 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Input Bypass Capacitor: an input bypass capacitor is not
required; however, for applications where the input source is high
impedance or far from the input pins, a bypass capacitor is recom-
mended. Connecting a 0.47 μ F capacitor from the input to
ground reduces the circuit’s sensitivity to PC board layout. If a
bigger output capacitor is used, the input capacitor should be 1 μ F
minimum.
Noise Reduction
A noise reduction capacitor (C NR ) can be used to further reduce
the noise by 6 dB–10 dB (Figure 3). Low leakage capacitors in
the 10 nF–100 nF range provide the best performance. For load
current less than 200 μ A, a 4.7 μ F output capacitor provides the
lowest noise and the best overall performance. Since the noise
reduction pin (NR) is internally connected to a high impedance
node, any connection to this node should be carefully done to
avoid noise pickup from external sources. The pad connected to
this pin should be as small as possible. Long PC board traces
are not recommended.
Most LDOs place strict requirements on the range of ESR
values for the output capacitor because they are difficult to
NR
ADP3300-5
C NR
10nF
stabilize due to the uncertainty of load capacitance and resis-
tance. Moreover, the ESR value, required to keep conventional
LDOs stable, changes depending on load and temperature.
These ESR limitations make designing with LDOs more diffi-
V IN
C1
1.0 F
+
IN
OUT
ERR
330k
E OUT
+
V OUT = 5V
C2
4.7 F
cult because of their unclear specifications and extreme variations
over temperature.
ON
OFF
This is no longer true with the ADP3300 anyCAP LDO. It can
SD
GND
be used with virtually any capacitor, with no constraint on the
minimum ESR. The innovative design allows the circuit to be
stable with just a small 0.47 μ F capacitor on the output. Addi-
tional advantages of the pole splitting scheme include superior line
–6 –
Figure 3. Noise Reduction Circuit
REV. C
相关PDF资料 |
PDF描述 |
|---|---|
| VE-JNV-EX-F1 | CONVERTER MOD DC/DC 5.8V 75W |
| GMC30DRYN | CONN EDGECARD 60POS DIP .100 SLD |
| GBM43DCSI-S288 | CONN EDGECARD 86POS .156 EXTEND |
| GSC30DRYH | CONN EDGECARD 60POS DIP .100 SLD |
| VI-J0D-CY-S | CONVERTER MOD DC/DC 85V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP3300ARTZ-3-RL7 | 功能描述:IC REG LDO 3V 50MA SOT23-6 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:anyCAP® 标准包装:45 系列:- 稳压器拓扑结构:正，固定式 输出电压:5V 输入电压:6 V ~ 30 V 电压 - 压降（标准）:0.47V @ 250mA 稳压器数量:1 电流 - 输出:250mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:通孔 封装/外壳:TO-220-3 供应商设备封装:TO-220-3 包装:管件 产品目录页面:1289 (CN2011-ZH PDF) 其它名称:*LP2954AIT*LP2954AIT/NOPBLP2954AIT |
| ADP3300ARTZ-5 | 制造商:Analog Devices 功能描述: |
| ADP3300ARTZ-5REEL7 | 功能描述:IC REG LDO 5V 50MA SOT23-6 RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:anyCAP® 标准包装:75 系列:- 稳压器拓扑结构:正，可调式 输出电压:1.2 V ~ 37 V 输入电压:4.2 V ~ 40 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:500mA 电流 - 限制（最小）:500mA 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:TO-252-3，DPak（2 引线+接片），SC-63 供应商设备封装:TO-252-3 包装:管件 产品目录页面:1286 (CN2011-ZH PDF) 其它名称:*LM317AMDT/NOPBLM317AMDT |
| ADP3301 | 制造商:AD 制造商全称:Analog Devices 功能描述:High Accuracy anyCAP⑩ Adjustable 200 mA Low Dropout Linear Regulator |
| ADP3301AR-2.7 | 制造商:Analog Devices 功能描述:LDO Regulator Pos 2.7V 0.2A 8-Pin SOIC N 制造商:Rochester Electronics LLC 功能描述:100 MA LINEAR REGULATOR - 2.7V - Bulk |
发布紧急采购，3分钟左右您将得到回复。