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| 型号： | ADP3335ACPZ-1.8-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V .5A 8-LFCSP |
| 标准包装： | 1 |
| 系列： | anyCAP® |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.8V |
| 输入电压： | 2.6 V ~ 12 V |
| 电压 - 压降（标准）： | 0.2V @ 500mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 500mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VFDFN 裸露焊盘，CSP |
| 供应商设备封装： | 8-LFCSP-VD（3x3） |
| 包装： | 标准包装 |
| 其它名称： | ADP3335ACPZ-1.8-R7DKR |
Data Sheet
THEORY OF OPERATION
The ADP3335 uses a single control loop for regulation and
reference functions. The output voltage is sensed by a resistive
voltage divider, R1 and R2, which is varied to provide the
available output voltage option. Feedback is taken from this
network by way of a series diode, D1, and a second resistor
divider, R3 and R4, to the input of an amplifier.
ADP3335
R4, the values can be chosen to produce a temperature stable
output. This unique arrangement specifically corrects for the
loading of the divider, thus avoiding the error resulting from
base current loading in conventional circuits.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. This special noninverting
INPUT
OUTPUT
driver enables the frequency compensation to include the load
COMPENSATION ATTENUATION
CAPACITOR
R3 D1
NONINVERTING
g m
V OS
DRIVER
CURRENT
Q1
WIDEBAND
ADP3335
(V BANDGAP /V OUT )
PTAT
PTAT
R4
R1
(a)
R2
C LOAD
R LOAD
capacitor in a pole-splitting arrangement to achieve reduced
sensitivity to the value, type, and ESR of the load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor, because they are difficult to
stabilize due to the uncertainty of load capacitance and resistance.
GND
Figure 23. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium produces a
large, temperature proportional input offset voltage that is
repeatable and very well controlled. The temperature proportional
offset voltage combines with the complementary diode voltage
to form a virtual band gap voltage implicit in the network, although
it never appears explicitly in the circuit.
This patented design makes it possible to control the loop with
only one amplifier. This technique also improves the noise
characteristics of the amplifier by providing more flexibility in
the trade-off of noise sources that leads to a low noise design.
The R1 and R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1 and R2 resistor
The ESR value required to keep conventional LDOs stable,
moreover, changes depending on load and temperature. These
ESR limitations make designing with LDOs more difficult
because of their unclear specifications and extreme variations
over temperature.
With the ADP3335 , ESR limitations are no longer a source of
design constraints. The ADP3335 can be used with virtually any
good quality capacitor and with no constraint on the minimum
ESR. This innovative design allows the circuit to be stable with
just a small 1 μF capacitor on the output. Additional advantages
of the pole-splitting scheme include superior line noise reject-
tion and very high regulator gain, which lead to excellent line
and load regulation. Impressive ±1.8% accuracy is guaranteed
over line, load, and temperature.
Additional features of the circuit include current limit, thermal
shutdown, and noise reduction.
divider is loaded by the D1 diode and a second divider—R3 and
Rev. D | Page 9 of 16
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| ADP3335ACPZ-2.5-R7 | 功能描述:IC REG LDO 2.5V .5A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:anyCAP® 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP3335ACPZ-2.85R7 | 功能描述:IC REG LDO 2.85V .5A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:anyCAP® 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP3335ACPZ-3.3-R7 | 功能描述:IC REG LDO 3.3V .5A 8-LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:anyCAP® 标准包装:75 系列:- 稳压器拓扑结构:正，可调式 输出电压:1.2 V ~ 37 V 输入电压:4.2 V ~ 40 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:500mA 电流 - 限制（最小）:500mA 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:TO-252-3，DPak（2 引线+接片），SC-63 供应商设备封装:TO-252-3 包装:管件 产品目录页面:1286 (CN2011-ZH PDF) 其它名称:*LM317AMDT/NOPBLM317AMDT |
| ADP3335ACPZ-3.3-RL | 功能描述:IC REG LDO 3.3V .5A 8LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:anyCAP® 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:2.7V 输入电压:最高 5.5V 电压 - 压降（标准）:0.21V @ 150mA 稳压器数量:1 电流 - 输出:150mA 电流 - 限制（最小）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 供应商设备封装:TSOT-23-5 包装:剪切带 (CT) 产品目录页面:1100 (CN2011-ZH PDF) 其它名称:576-1852-1 |
| ADP3335ACPZ-5 | 制造商:Analog Devices 功能描述:ADP3335ACPZ-5 |
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