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参数资料
| 型号： | ADP3418 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Dual Bootstrapped 12 V MOSFET Driver with Output Disable |
| 中文描述： | 12伏双自举MOSFET驱动器与输出禁用 |
| 文件页数： | 3/12页 |
| 文件大小： | 224K |
| 代理商： | ADP3418 |
REV. 0
ADP3418
–3–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADP3418 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS
*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V
BST . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to VCC + 15 V
BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V
SW
DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to +15 V
<200 ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to +15 V
DRVH . . . . . . . . . . . . . . . . . . . . . . SW – 0.3 V to BST + 0.3 V
DRVL (<200 ns) . . . . . . . . . . . . . . . . . . . –2 V to VCC + 0.3 V
All Other Inputs and Outputs . . . . . . . –0.3 V to VCC + 0.3 V
Operating Ambient Temperature Range . . . . . . . .0
°
C to 85
°
C
Operating Junction Temperature Range . . . . . . .0
°
C to 150
°
C
Storage Temperature Range . . . . . . . . . . . . .–65
°
C to +150
°
C
PIN CONFIGURATION
RN-8
ADP3418
TOP VIEW
(Not to Scale)
BST
IN
OD
VCC
DRVH
SW
PGND
DRVL
1
2
3
8
7
6
4
5
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Description
1
BST
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins holds
this bootstrapped voltage for the high-side MOSFET as it is switched. The capacitor should be chosen between
100 nF and 1
μ
F.
Logic Level Input. This pin has primary control of the drive outputs.
Output Disable. When low, this pin disables normal operation, forcing DRVH and DRVL low.
Input Supply. This pin should be bypassed to PGND with ~1
μ
F ceramic capacitor.
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.
Power Ground. Should be closely connected to the source of the lower MOSFET.
This pin is connected to the buck-switching node, close to the upper MOSFET’s source. It is the floating
return for the upper MOSFET drive signal. It is also used to monitor the switched voltage to prevent turn-on of
the lower MOSFET until the voltage is below ~1 V. Thus, according to operating conditions, the high-low
transition delay is determined at this pin.
Buck Drive. Output drive for the upper (buck) MOSFET.
2
3
4
5
6
7
IN
OD
VCC
DRVL
PGND
SW
8
DRVH
Junction-to-Air Thermal Resistance (
θ
JA
)
2-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
°
C/W
4-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
°
C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300
°
C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°
C
*
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Absolute maximum
ratings apply individually only, not in combination. Unless otherwise specified, all
voltages are referenced to PGND.
ORDERING GUIDE
Model
Temperature Range
0
°
C to 85
°
C
Package Option
ADP3418JR
RN-8 (SOIC-8)
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