参数资料
型号: ADR525BKSZ-REEL7
厂商: Analog Devices Inc
文件页数: 11/16页
文件大小: 0K
描述: IC VREF SHUNT PREC 2.5V SC-70-3
标准包装: 1
基准类型: 旁路,精度
输出电压: 2.5V
容差: ±0.2%
温度系数: 40ppm/°C
通道数: 1
电流 - 阴极: 50µA
电流 - 输出: 15mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SC-70,SOT-323
供应商设备封装: SC-70-3
包装: 标准包装
产品目录页面: 796 (CN2011-ZH PDF)
其它名称: ADR525BKSZ-REEL7DKR

ADR520/ADR525/ADR530/ADR540/ADR550
THEORY OF OPERATION
The ADR520/ADR525/ADR530/ADR540/ADR550 use the
V S
band gap concept to produce a stable, low temperature coefficient
voltage reference suitable for high accuracy data acquisition
R
I IN + I L
components and systems. The devices use the physical nature of a
silicon transistor base-emitter voltage (V BE ) in the forward-biased
operating region. All such transistors have approximately a
I IN
I L
ADR550
V OUT
?2 mV/°C temperature coefficient (TC), making them unsuitable
Figure 19. Shunt Reference
V S ? V OUT
R BIAS =
for direct use as low temperature coefficient references. Extra-
polation of the temperature characteristics of any one of these
devices to absolute zero (with the collector current proportional
to the absolute temperature), however, reveals that its V BE
approaches approximately the silicon band gap voltage. Thus,
if a voltage develops with an opposing temperature coefficient
to sum the V BE , a zero temperature coefficient reference results.
The ADR520/ADR525/ADR530/ADR540/ADR550 circuit
shown in Figure 18 provides such a compensating voltage (V1)
by driving two transistors at different current densities and
Given these conditions, R BIAS is determined by the supply
voltage (V S ), the load and operating currents (I L and I IN ) of
the ADR520/ADR525/ADR530/ADR540/ADR550, and the
output voltage (V OUT ) of the ADR520/ADR525/ADR530/
ADR540/ADR550.
I L + I IN
Precision Negative Voltage Reference
(3)
amplifying the resultant V BE difference (ΔV BE , which has a
positive temperature coefficient). The sum of V BE and V1
provides a stable voltage reference over temperature.
The ADR520/ADR525/ADR530/ADR540/ADR550 are suit-
able for applications where a precise negative voltage is desired.
Figure 20 shows the ADR525 configured to provide a negative
+
V1
V+
output.
ADR525
–2.5V
R
+
V BE
+
Δ V BE
V–
V S
Figure 20. Negative Precision Reference Configuration
Output Voltage Trim
APPLICATIONS
Figure 18. Circuit Schematic
The trim terminal of the ADR520/ADR525/ADR530/ADR540/
ADR550 can be used to adjust the output voltage over a range
of ±0.5%. This allows systems designers to trim system errors
The ADR520/ADR525/ADR530/ADR540/ADR550 are a
series of precision shunt voltage references. They are designed
to operate without an external capacitor between the positive
and negative terminals. If a bypass capacitor is used to filter the
supply, the references remain stable.
All shunt voltage references require an external bias resistor (R BIAS )
by setting the reference to a voltage other than the preset output
voltage. An external mechanical or electrical potentiometer can
be used for this adjustment. Figure 21 illustrates how the output
voltage can be trimmed using the AD5273 , an Analog Devices,
Inc., 10 kΩ potentiometer.
V S
between the supply voltage and the reference (see Figure 19).
R BIAS sets the current that flows through the load (I L ) and the
reference (I IN ). Because the load and the supply voltage can vary,
R BIAS needs to be chosen based on the following considerations:
? R BIAS must be small enough to supply the minimum I IN
R
ADR530
R1
470k ?
V OUT
AD5273
POTENTIOMETER
10k ?
current to the ADR520/ADR525/ADR530/ADR540/
ADR550, even when the supply voltage is at its minimum
value and the load current is at its maximum value.
Figure 21. Output Voltage Trim
?
R BIAS must be large enough so that I IN does not exceed
15 mA when the supply voltage is at its maximum value
and the load current is at its minimum value.
Rev. E | Page 11 of 1 6
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