参数资料
型号: ADS1222IPWT
厂商: Texas Instruments
文件页数: 2/26页
文件大小: 0K
描述: IC 24BIT ADC W/2CH MUX 14-TSSOP
产品培训模块: Data Converter Basics
视频文件: Nuts and Bolts of the Delta-Sigma Converter
标准包装: 1
位数: 24
采样率(每秒): 240
数据接口: 串行
转换器数目: 1
功率耗散(最大): 2.25mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 标准包装
输入数目和类型: 4 个单端,单极;2 个差分,双极
其它名称: 296-17321-6
ADS1222
SBAS314B APRIL 2004 REVISED JANUARY 2009
www.ti.com
10
TEMPERATURE SENSOR
On-chip diodes provide temperature-sensing capabili-
ty. By setting the TEMPEN pin high, the selected analog
inputs are disconnected and the inputs to the A/D
converter are connected to the anodes of two diodes
scaled to 1x and 64x in current and size inside the mux,
as shown in Figure 18. By measuring the difference in
voltage of these diodes, temperature changes can be
inferred from a baseline temperature. Typically, the
difference in diode voltages is 106mV at 25
°C, with a
temperature coefficient of 360
V/°C. A similar structure
is used in the MSC1210 for temperature measurement.
For more information, see TI application report
SBAA100, Using the MSC121x as a High-Precision
Intelligent Temperature Sensor, available for download
at www.ti.com.
AINP
AINP1
AINN1
AINP2
AINN2
8I
1I
1X
8X
AINN
TEMPEN
VDD
MUX
Figure 18. Measurement of the Temperature
Sensor in the Input Multiplexer
VOLTAGE REFERENCE INPUTS
(VREFP, VREFN)
The voltage reference used by the modulator is
generated from the voltage difference between VREFP
and VREFN: VREF = VREFP – VREFN. The reference
inputs use a structure similar to that of the analog
inputs. A simplified diagram of the circuitry on the
reference inputs is shown in Figure 19. The switches
and capacitors can be modeled with an effective
impedance of:
t
sample
2
16pF
+ 500kW
where fCLK = 2MHz.
VDD
Self Gain Cal
AINP
(1) f
CLK =2MHz
AINN
VREFP
VREFN
VDD
ESD
Protection
16pF
Zeff = 500k
(1)
Figure 19. Simplified Reference Input Circuitry
ESD diodes protect the reference inputs. To prevent
these diodes from turning on, make sure the voltages
on the reference pins do not go below GND by more
than 100mV, and likewise, do not exceed VDD by
100mV:
GND – 100mV < (VREFP, VREFN) < VDD + 100mV
During self gain calibration, all the switches in the input
multiplexer are opened, VREFN is internally connected
to AINN, and VREFP is connected to AINP. The input
buffer may be disabled or enabled during calibration.
When the buffer is disabled, the reference pins will be
driving the circuitry shown in Figure 9 during self gain
calibration, resulting in increased loading. To prevent
this additional loading from introducing gain errors,
make sure the circuitry driving the reference pins has
adequate drive capability. When the buffer is enabled,
the loading on the reference pins will be much less, but
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