参数资料
| 型号： | ADS1286UB/2K5G4 |
| 厂商： | Texas Instruments |
| 文件页数： | 10/17页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SPI 37KSPS 8SOIC |
| 标准包装： | 2,500 |
| 位数： | 12 |
| 采样率（每秒）： | 20k |
| 数据接口： | 串行，SPI?，SSI |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，单极 |
2
ADS1286
SPECIFICATIONS
At TA = TMIN to TMAX, +VCC = +5V, VREF = +5V, fSAMPLE = 12.5kHz, , fCLK = 16 fSAMPLE, unless otherwise specified.
TIMING CHARACTERISTICS
fCLK = 200kHz, TA = TMIN to TMAX.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tSMPL
Analog Input Sample Time
See Operating Sequence
1.5
2.0
Clk Cycles
tSMPL (MAX)
Maximum Sampling Frequency
ADS1286
20
kHz
tCONV
Conversion Time
See Operating Sequence
12
Clk Cycles
tdDO
Delay TIme, DCLOCK
↓ to D
OUT Data Valid
See Test Circuits
85
150
ns
tdis
Delay TIme, CS
↑ to D
OUT Hi-Z
See Test Circuits
25
50
ns
ten
Delay TIme, DCLOCK
↓ to D
OUT Enable
See Test Circuits
50
100
ns
thDO
Output Data Remains Valid After DCLOCK
↓
CLOAD = 100pF
15
30
ns
tf
DOUT Fall Time
See Test Circuits
70
100
ns
tr
DOUT Rise Time
See Test Circuits
60
100
ns
tCSD
Delay Time, CS
↓ to DCLOCK↓
See Operating Sequence
0
ns
tSUCS
Delay Time, CS
↓ to DCLOCK↑
See Operating Sequence
30
ns
ADS1286, ADS1286A
ADS1286K, ADS1286B
ADS1286C, ADS1286L
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ANALOG INPUT
Full-Scale Input Range
+In – (–In)
0
VREF
TT
V
Absolute Input Voltage
+In
–0.2
VCC +0.2
TT
V
–In
–0.2
+0.2
TT
V
Capacitance
25
TT
pF
Leakage Current
±1
TT
A
SYSTEM PERFORMANCE
Resolution
12
TT
Bits
No Missing Codes
12
TT
Bits
Integral Linearity
±1
±2
TT
±0.5
±1
LSB
Differential Linearity
±0.5
±1.0
T
±0.75
±0.25
±0.75
LSB
Offset Error
0.75
±3
TT
LSB
Gain Error
±2
±8
TT
LSB
Noise
50
TT
Vrms
Power Supply Rejection
82
TT
dB
SAMPLING DYNAMICS
Conversion Time
12
TT
Clk Cycles
Acquisition Time
1.5
TT
Clk Cycles
Small Signal Bandwidth
500
TT
kHz
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
VIN = 5.0Vp-p at 1kHz
–85
TT
dB
VIN = 5.0Vp-p at 5kHz
–83
TT
dB
SINAD
VIN = 5.0Vp-p at 1kHz
72
TT
dB
Spurious Free Dynamic Range
VIN = 5.0Vp-p at 1kHz
90
TT
dB
REFERENCE INPUT
REF Input Range
1.25
2.5
VCC+0.05V
TTTTTT
V
Input Resistance
CS = VCC
5000
TT
M
CS = GND, fCLK = 0Hz
5000
TT
M
Current Drain
CS = VCC
0.01
2.5
TT
A
tCYC ≥ 640s, fCLK ≤ 25kHz
2.4
20
TT
A
tCYC = 80s, fCLK = 200kHz
2.4
20
TT
A
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
TT
Logic Levels:
VIH
IIH = +5A3
+VCC
TT
V
VIL
IIL = +5A
0.0
0.8
TT
V
VOH
IOH = 250A3
+VCC
TT
V
VOL
IOL = 250A
0.0
0.4
TT
V
Data Format
Straight Binary
TT
POWER SUPPLY REQUIREMENTS
Power Supply Voltage
VCC
+4.50
5
5.25
TTTTTT
V
Quiescent Current, VANA
tCYC ≥ 640S, fCLK ≤ 25kHz
200
400
TT
A
tCYC = 90S, fCLK = 200kHz
250
500
TT
A
Power Down
CS = VCC
3
TT
A
TEMPERATURE RANGE
Specified Performance
ADS1286, K, L
0
+70
TT
°C
ADS1286A, B, C
–40
+85
TT
°C
T Specifications same as grade to the left.
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