参数资料
型号: ADS1601EVM
厂商: Texas Instruments
文件页数: 14/29页
文件大小: 0K
描述: EVALUATION MODULE FOR ADS1601
标准包装: 1
ADC 的数量: 1
位数: 16
采样率(每秒): 1.25M
数据接口: 串行
输入范围: ±3 V
在以下条件下的电源(标准): 145mW @ 625kSPS,330mW @ 1.25MSPS
工作温度: -40°C ~ 85°C
已用 IC / 零件: ADS1601
已供物品:
相关产品: 296-17631-6-ND - IC ADC 16BIT 1.25MSPS 48-TQFP
ADS1601IPFBTG4-ND - IC ADC 16BIT 1.25MSPS 48-TQFP
ADS1601IPFBRG4-ND - IC ADC 16BIT 1.25MSPS 48-TQFP
ADS1601IPFBR-ND - IC ADC 16BIT 1.25MSPS 48-TQFP
296-17631-1-ND - IC ADC 16BIT 1.25MSPS 48-TQFP
296-17631-2-ND - IC ADC 16BIT 1.25MSPS 48-TQFP
其它名称: 296-17825
C
P
C
P
C
P
C
P
C
P
C
P
C
P
C
P
1
36
DGND
2
3
9
10
11
12
18
42
41
55
38
37
34
33
19
22
23
AVDD
AGND
C
P
6
7
AVDD
AGND
AVDD
47 F
m
47 F
m
47 F
m
4.7 F
m
1 F
m
0.1 F
m
0.1 F
m
0.1 F
m
1 F
m
1 F
m
4.7 F
m
4.7 F
m
DVDD
A
VDD
AGND
DGND
IOVDD
DVDD
DGND
15
10kW
RPULL
UP
DGND
DVDD
ADS1601
Ifusingseparateanalogand
digitalgroundplanes,connect
togetherontheADS1601PCB.
DGND
NOTE:C =
P
1 F
m
úú
m
0.1 F
AGND
AVDD
IOVDD
DVDD
SBAS322D
– DECEMBER 2004 – REVISED OCTOBER 2011
POWER DOWN (PD)
POWER SUPPLIES
When not in use, the ADS1601 can be powered down
Three supplies are used on the ADS1601: analog
by taking the PD pin low. All circuitry is shut down,
(AVDD), digital (DVDD) and digital I/O (IOVDD). Each
including the voltage reference. To minimize the
supply must be suitably bypassed to achieve the best
digital current during power down, stop the clock
performance. It is recommended that a 1
μF and
signal supplied to the CLK input. There is an internal
0.1
μF ceramic capacitor be placed as close to each
pull-up resistor of 170k
on the PD pin, but it is
supply pin as possible. Connect each supply-pin
recommended that this pin be connected to IOVDD if
bypass capacitor to the associated ground, as shown
not used. Make sure to allow time for the reference to
in Figure 50. Each main supply bus should also be
start up after exiting power-down mode. The internal
bypassed with a bank of capacitors from 47
μF to
reference typically requires 15ms. After the reference
0.1
μF, as shown. The I/O and digital supplies (IOVDD
has stabilized, allow at least 100 conversions for the
and DVDD) can be connected together when using
modulator and digital filter to settle before retrieving
the same voltage. In this case, only one bank of 47
μF
data.
to 0.1
μF capacitors is needed on the main supply
bus, though each supply pin must still be bypassed
with a 1
μF and 0.1μF ceramic capacitor.
Figure 50. Recommended Power-Supply Bypassing
Copyright
2004–2011, Texas Instruments Incorporated
21
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