参数资料
型号: ADS1601IPFBR
厂商: Texas Instruments
文件页数: 27/29页
文件大小: 0K
描述: IC ADC 16BIT 1.25MSPS 48-TQFP
产品培训模块: Data Converter Basics
视频文件: Nuts and Bolts of the Delta-Sigma Converter
标准包装: 1,000
位数: 16
采样率(每秒): 1.25M
数据接口: 串行
转换器数目: 1
功率耗散(最大): 380mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 带卷 (TR)
输入数目和类型: 1 个差分,双极
配用: 296-17825-ND - EVALUATION MODULE FOR ADS1601
VREFP
VMID
VREFN
VCAP
A
VDD
AGND
CLK
AGND
DGND
IOVDD
NC
RPULL
UP
PD
NC
DVDD
DGND
SYNC
OTR
DGND
DVDD
NC
REFEN
36
35
34
33
32
31
30
29
28
27
26
25
DGND
NC
DVDD
DGND
FSO
DOUT
SCLK
NC
1
2
3
4
5
6
7
8
9
10
11
12
AGND
AVDD
AGND
AINN
AINP
AGND
AVDD
RBIAS
AGND
AVDD
AGND
AVDD
48
47
46
45
44
43
42
41 40
39
38
13
14
15
16
17
18
19
20
21 22
23
37
24
ADS1601
TQFPPACKAGE
(TOPVIEW)
SBAS322D
– DECEMBER 2004 – REVISED OCTOBER 2011
PIN ASSIGNMENTS
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
AGND
1, 3, 6, 9, 11, 39, 41
Analog
Analog ground
AVDD
2, 7, 10, 12, 42
Analog
Analog supply
AINN
4
Analog input
Negative analog input
AINP
5
Analog input
Positive analog input
RBIAS
8
Analog
Terminal for external analog bias setting resistor.
REFEN
13
Digital input: active low
Internal reference enable. Internal pull-down resistor of 170k
to DGND.
NC
14, 16, 24
–26, 35
Do not connect
These terminals must be left unconnected.
RPULLUP
15
Digital Input
Pull-up to DVDD with 10k
resistor (see Figure 50).
PD
17
Digital input: active low
Power-down all circuitry. Internal pull-up resistor of 170k
to DGND.
DVDD
18, 23, 34
Digital
Digital supply
DGND
19, 22, 33, 36, 38
Digital
Digital ground
SYNC
20
Digital input
Synchronization control input
OTR
21
Digital output
Indicates analog input signal is out of range.
SCLK
28
Digital output
Serial clock output
SCLK
27
Digital output
Serial clock output, complementary signal.
DOUT
30
Digital output
Data output
DOUT
29
Digital output
Data output, complementary signal.
FSO
32
Digital output
Frame synchronization output
FSO
31
Digital output
Frame synchronization output, complementary signal.
IOVDD
37
Digital
Digital I/O supply
CLK
40
Digital output
Clock input supply
VCAP
43
Analog
Terminal for external bypass capacitor connection to internal bias voltage.
VREFN
44, 45
Analog
Negative reference voltage
VMID
46
Analog
Midpoint voltage
VREFP
47, 48
Analog
Positive reference voltage
Copyright
2004–2011, Texas Instruments Incorporated
7
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