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| 型号： | ADS8412IBPFBT |
| 厂商： | Texas Instruments |
| 文件页数： | 14/30页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 2MSPS 48-TQFP |
| 产品培训模块： | Data Converter Basics |
| 标准包装： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 2M |
| 数据接口： | 并联 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 200mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP |
| 供应商设备封装： | 48-TQFP（7x7） |
| 包装： | 标准包装 |
| 输入数目和类型： | 1 个差分，单极 |
| 配用： | 296-18385-ND - EVALUATION MODULE FOR ADS8412 |
| 其它名称： | 296-15254-6 |
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_
+
_
+
IN-
IN+
ADS8412
_
+
VCC+
VCC-
1 k
1 k
THS4503
68 pF
50
50
20 pF
RG
RS
RT
OCM
1 k
RG, RS, and RT should be chosen such that
RG + RS || RT = 1 k
VOCM = 2 V, +VCC = 7 V, and -VCC = -7 V
DIGITAL INTERFACE
Timing And Control
Reading Data
ADS8412
SLAS384A – JUNE 2003 – REVISED DECEMBER 2004
PRINCIPLES OF OPERATION (continued)
Figure 31. Using THS4503 With ADS8412
See the timing diagrams in the specifications section for detailed information on timing signals and their
requirements.
The ADS8412 uses an internal oscillator generated clock which controls the conversion rate and in turn the
throughput of the converter. No external clock input is required.
Conversions are initiated by bringing the CONVST pin low for a minimum of 20 ns (after the 20 ns minimum
requirement has been met, the CONVST pin can be brought high), while CS is low. The ADS8412 switches from
the sample to the hold mode on the falling edge of the CONVST command. A clean and low jitter falling edge of
this signal is important to the performance of the converter. The BUSY output is brought high after CONVST
goes low. BUSY stays high throughout the conversion process and returns low when the conversion has ended.
Sampling starts when CS is tied low or starts with the falling edge of CS when BUSY is low.
Both RD and CS can be high during and before a conversion with one exception (CS must be low when
CONVST goes low to initiate a conversion). Both the RD and CS pins are brought low in order to enable the
parallel output bus with the conversion.
The ADS8412 outputs full parallel data in two's complement format as shown in Table 1. The parallel output is
active when CS and RD are both low. There is a minimal quiet zone requirement around the falling edge of
CONVST. This is 50 ns prior to the falling edge of CONVST and 40 ns after the falling edge. No data read should
be attempted within this zone. Any other combination of CS and RD sets the parallel output to 3-state. BYTE is
used for multiword read operations. BYTE is used whenever lower bits of the conversion result are output on the
higher byte of the bus. Refer to Table 1 for ideal output codes.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADS8412IBPFBT | 制造商:Texas Instruments 功能描述:IC ADC 16BIT 2MSPS ((NW)) |
| ADS8412IBPFBTG4 | 功能描述:模数转换器 - ADC 16 Bit 2MSPS Parallel RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS8412IPFB | 制造商:Texas Instruments 功能描述:16 BIT 2MSPS PARALLEL ADC W/REF, PSEUDO BIPOLAR FULLY DIFFER - Rail/Tube |
| ADS8412IPFBR | 功能描述:模数转换器 - ADC 16 Bit 2MSPS Parallel RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| ADS8412IPFBRG4 | 功能描述:模数转换器 - ADC 16 Bit 2MSPS Parallel RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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