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| 型号： | ADSP-2189NBCA-320 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 46/48页 |
| 文件大小： | 0K |
| 描述： | IC DSP 16BIT 80MHZ 144CSPBGA |
| 标准包装： | 1 |
| 系列： | ADSP-21xx |
| 类型： | 定点 |
| 接口： | 主机接口，串行端口 |
| 时钟速率： | 80MHz |
| 非易失内存： | 外部 |
| 芯片上RAM： | 192kB |
| 电压 - 输入/输出： | 1.8V，2.5V，3.3V |
| 电压 - 核心： | 1.90V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LFBGA，CSPBGA |
| 供应商设备封装： | 144-CSBGA（10x10） |
| 包装： | 托盘 |
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ADSP-218xN
Rev. A
|
Page 7 of 48
|
August 2006
such as SCLK, CLKOUT, and timer clock, are reduced by the
same ratio. The default form of the instruction, when no clock
divisor is given, is the standard IDLE instruction.
When the IDLE (n) instruction is used, it effectively slows down
the processor’s internal clock and thus its response time to
incoming interrupts. The one-cycle response time of the stan-
dard idle state is increased by n, the clock divisor. When an
enabled interrupt is received, ADSP-218xN series members
remain in the idle state for up to a maximum of n processor
cycles (n = 16, 32, 64, or 128) before resuming nor-
mal operation.
When the IDLE (n) instruction is used in systems that have an
externally generated serial clock (SCLK), the serial clock rate
may be faster than the processor’s reduced internal clock rate.
Under these conditions, interrupts must not be generated at a
faster rate than can be serviced, due to the additional time the
processor takes to come out of the idle state (a maximum of n
processor cycles).
SYSTEM INTERFACE
Figure 2 shows typical basic system configurations with the
ADSP-218xN series, two serial devices, a byte-wide EPROM,
and optional external program and data overlay memories
(mode-selectable). Programmable wait state generation allows
the processor to connect easily to slow peripheral devices.
ADSP-218xN series members also provide four external inter-
rupts and two serial ports or six external interrupts and one
serial port. Host Memory Mode allows access to the full external
data bus, but limits addressing to a single address bit (A0).
Through the use of external hardware, additional system
peripherals can be added in this mode to generate and latch
address signals.
Figure 2. Basic System Interface
In
ser
t s
yst
em
int
erf
ac
e d
iag
ram
he
re
1/2
CLOCK
OR
CRYSTAL
FL0–2
CLKIN
XTAL
SERIAL
DEVICE
SCLK1
RFS1 OR
IRQ0
TFS1 OR
IRQ1
DT1 OR FO
DR1 OR FI
SPORT1
SERIAL
DEVICE
A0–A21
DATA
BYTE
MEMORY
I/O SPACE
(PERIPHERALS)
DATA
ADDR
DATA
ADDR
2048 LOCATIONS
OVERLAY
MEMORY
TWO 8K
PM SEGMENTS
D23–0
A13–0
D23–8
A10–0
D15–8
D23–16
A13–0
14
24
SCLK0
RFS0
TFS0
DT0
DR0
SPORT0
DATA23–0
ADSP-218xN
CS
1/2
CLOCK
OR
CRYSTAL
CLKIN
XTAL
FL0–2
SERIAL
DEVICE
SCLK1
RFS1 OR
IRQ0
TFS1 OR
IRQ1
DT1 OR FO
DR1 OR FI
SPORT1
16
IDMA PORT
IRD/D6
IS/D4
IAL/D5
IACK/D3
IAD15-0
SERIAL
DEVICE
SCLK0
RFS0
TFS0
DT0
DR0
SPORT0
1
16
A0
DATA23–8
IOMS
BMS
DMS
CMS
BR
BG
BGH
PWD
PWDACK
HOST MEMORY MODE
FULL MEMORY MODE
MODE D/PF3
MODE C/PF2
MODE B/PF1
MODE A/PF0
IRQ2/PF7
IRQE/PF4
IRQL0/PF5
MODE D/PF3
MODE C/PF2
MODE B/PF1
MODE A/PF0
WR
RD
SYSTEM
INTERFACE
OR
CONTROLLER
IRQ2/PF7
IRQE/PF4
IRQL0/PF5
IRQL1/PF6
IOMS
BMS
PMS
CMS
BR
BG
BGH
PWD
PWDACK
WR
RD
ADSP-218xN
DMS
TWO 8K
DM SEGMENTS
PMS
ADDR13–0
IRQL1/PF6
IWR/D7
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| ADSP-2189NBCAZ-320 | 功能描述:IC DSP 16BIT 80MHZ 144CSPBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP（数字式信号处理器） 系列:ADSP-21xx 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI，以太网，RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA，FCBGA 供应商设备封装:431-FCPBGA（20x20） 包装:托盘 |
| ADSP-2189NBCAZ-3202 | 制造商:AD 制造商全称:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2189NBST-320 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 80MHz 80MIPS 100-Pin LQFP 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
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